参数资料
型号: MAX11100EUB+T
厂商: Maxim Integrated Products
文件页数: 19/19页
文件大小: 0K
描述: IC ADC 16BIT SRL 200KSPS 10UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
位数: 16
采样率(每秒): 200k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 444mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-uMAX
包装: 标准包装
输入数目和类型: 1 个单端,单极
其它名称: MAX11100EUB+TDKR
Maxim Integrated Products 9
MAX11100
16-Bit, +5V, 200ksps ADC with 10A Shutdown
Detailed Description
The MAX11100 includes an input track-and-hold (T/H)
and successive-approximation register (SAR) circuitry to
convert an analog input signal to a digital 16-bit output.
Figure 4 shows the MAX11100 in its simplest configura-
tion. The serial interface requires only three digital lines
(SCLK, CS, and DOUT) and provides an easy interface
to microprocessors (FPs).
The MAX11100 has two power modes: normal and shut-
down. Driving CS high places the MAX11100 in shut-
down, reducing the supply current to 0.1FA (typ), while
pulling CS low places the MAX11100 in normal operating
mode. Falling edges on CS initiate conversions that are
driven by SCLK. The conversion result is available at
DOUT in unipolar serial format. The serial data stream
consists of eight zeros followed by the data bits (MSB
first). Figure 3 shows the interface timing diagram.
Analog Input
Figure 5 illustrates the input sampling architecture of the
ADC. The voltage applied at REF sets the full-scale input
voltage.
Track-and-Hold (T/H)
In track mode, the analog signal is acquired on the inter-
nal hold capacitor. In hold mode, the T/H switches open
and the capacitive DAC samples the analog input.
Figure 1. Load Circuits for DOUT Enable Time and SCLK to
DOUT Delay Time
Figure 2. Load Circuits for DOUT Disable Time
Figure 3. Detailed Serial Interface Timing
DOUT
a) VOL TO VOH
b) HIGH-Z TO VOL AND VOH TO VOL
DOUT
1mA
DGND
CLOAD = 50pF
VDD
DOUT
a) VOH TO HIGH-Z
b) VOL TO HIGH-Z
DOUT
1mA
DGND
CLOAD = 50pF
VDD
SCLK
DOUT
tCSS
tCH
tCL
tDV
tCSH
tCSW
tTR
tDO
tCP
CS
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