参数资料
型号: MAX15022ATI+T
厂商: Maxim Integrated
文件页数: 23/28页
文件大小: 0K
描述: IC REG QD BCK/LINEAR SYNC 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
拓扑: 降压(降压)同步(2),线性(LDO)(2)
功能: 任何功能
输出数: 4
频率 - 开关: 500kHz ~ 4MHz
电压/电流 - 输出 1: 0.6 V ~ 5.5 V,4A
电压/电流 - 输出 2: 0.6 V ~ 5.5 V,2A
电压/电流 - 输出 3: 控制器
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 带卷 (TR)
Dual, 4A/2A, 4MHz, Step-Down DC-DC
Regulator with Dual LDO Controllers
The input capacitance to the base of the pass transistor
(C QIN ), any external base-to-emitter capacitance (C BE ,
see the Base-Drive Noise Reduction section), the tran-
sistor’s input resistance (R IN ), and the base-to-emitter
pullup resistor (R P_ ) set a second pole:
If the output capacitor is a high-ESR capacitor, then
cancel the ESR zero with a pole at FB3/4. This is
accomplished by adding a capacitor (C FB3/4 ) from
FB3/4 to ground, such that:
f POLE2 [kHz] =
1
2 π ( C BE + C QIN ) [ μ F ] × R TOTAL [ k ? ]
C FB3/4 [ μ F ] =
1
2 π × (R 1FB3/4 R 2FB3/4 ) [ k ? ] × f ESR [kHz]
For a sufficiently low output capacitance, choose a fast
R P1/2 >> R IN ≈
where R TOTAL = R IN R P1/2 .
To maintain the stability, at a minimum the following
condition must be satisfied:
A V × f POLE1 < f POLE2
i.e., the second pole must occur above the unity-gain
crossover. At heavy output load, we can simplify as fol-
lows:
R OUT3/4 << R 1FB3/4 + R 2FB3/4
C BE << C QIN ≈ g m ? PNP × τ F
β
g m ? PNP
And hence, the output capacitance (C OUT3/4 ) must sat-
isfy the following equation:
C OUT3/4 > α × g C_ × τ F × β 2
where:
PNP transistor without an excessively high ?. Note,
selecting a transistor with a ? that is too low can
adversely impact load regulation.
Output 3 and Output 4 Capacitors
Connect C OUT (as determined above) between the lin-
ear regulator’s output and ground, as close as possible
to the MAX15022 and the external pass transistors.
Depending on the selected pass transistor, larger
capacitor values may be required for stability (see the
Stability Requirement section).
Once the minimum capacitor value for stability is deter-
mined, verify that the linear regulator’s output does not
contain excessive noise. Although adequate for stabili-
ty, small capacitor values can provide too much band-
width, making the linear regulator sensitive to noise.
Larger capacitor values reduce the bandwidth, thereby
reducing the regulator’s noise sensitivity.
Base-Drive Noise Reduction
The high-impedance base driver is susceptible to sys-
tem noise, especially when the linear regulator is lightly
loaded. Capacitively coupled switching noise or induc-
α=
R 2FB3/4
R 1FB3/4 + R 2FB3/4
tively coupled EMI on the base drive may cause fluctu-
ations in the base current, which appear as noise on
the linear regulator’s output. To avoid this, keep the
base-driver traces away from the step-down converter
? is the current gain of the PNP transistor, g C_ is the
transconductance of the internal amplifier (1.2mA/mV
typical), and τ F is the forward transit time of the PNP
transistor. For example, using a PNP transistor with a ?
of 120, τ F of 400ps, g C_ = 1.2mA/mV, and α = 0.5 for a
1.2V output voltage, C OUT must be at least 3.9μF.
If the second pole occurs well after unity-gain crossover,
the linear regulator remains stable. If not, then increase
the output capacitance, C OUT3/4 , such that:
f POLE2 > 2 × f COUT_
and as short as possible to minimize noise coupling.
A bypass capacitor (C BE ) can be placed across the
base-to-emitter resistor. This bypass capacitor, in addi-
tion to the transistor’s input capacitance, reduces the
frequency of the second pole (f POLE2 ) that could desta-
bilize the linear regulator. Therefore, the stability
requirements determine the maximum base-to-emitter
capacitance (C BE ) that can be added. A capacitance
in the range of 470pF to 2200pF is recommended.
______________________________________________________________________________________
23
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