参数资料
型号: MAX15023EVKIT+
厂商: Maxim Integrated Products
文件页数: 9/28页
文件大小: 0K
描述: KIT EVALUATION FOR MAX15023 CTLR
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 2,非隔离
输出电压: 1.2V,3.3V
电流 - 输出: 10A,5A
输入电压: 9 ~ 16 V
稳压器拓扑结构: 降压
频率 - 开关: 500kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: MAX15023
MAX15023
Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
NAME
FB1
EN1
EN2
PGOOD1
DL1
PGND1
LX1
BST1
DH1
DH2
BST2
LX2
FUNCTION
Feedback Input for Regulator 1. Connect FB1 to a resistive divider between Output 1 and SGND to adjust
the output voltage between 0.6V and (0.85 x input voltage (V)). See the Setting the Output Voltage section.
Active-High Enable Input for Regulator 1. When the voltage at EN1 exceeds 1.2V (typ), the controller begins
regulating OUT1. When the voltage falls below 1.05V (typ), the regulator is turned off. The EN1 input can be
used for power sequencing and as a secondary UVLO. Connect EN1 to V CC for always-on applications.
Active-High Enable Input for Regulator 2. When the voltage at EN2 exceeds 1.2V (typ), the controller begins
regulating OUT2. When the voltage falls below 1.05V (typ), the regulator is turned off. The EN2 input can be
used for power sequencing and as a secondary UVLO. Connect EN2 to V CC for always-on applications.
Power-Good Output (Open Drain) for Channel 1. To obtain a logic signal, pull up PGOOD1 with an external
resistor connected to a positive voltage below 28V.
Low-Side Gate-Driver Output for Regulator 1. DL1 swings from V CC to PGND1. DL1 is low before V CC
reaches the UVLO rising threshold voltage.
Low-Side Gate-Driver Supply Return (Regulator 1). Connect to the source of the low-side MOSFET of
Regulator 1.
External Inductor Connection for Regulator 1. Connect LX1 to the switched side of the inductor. LX1 serves
as the lower supply rail for the DH1 high-side gate driver and as sensing input of the synchronous
MOSFET’s V DS drop (drain terminal).
Boost Flying-Capacitor Connection for Regulator 1. Connect a ceramic capacitor with a minimum value of
100nF between BST1 and LX1.
High-Side Gate-Driver Output for Regulator 1. DH1 swings from LX1 to BST1. DH1 is low before V CC
reaches the UVLO rising threshold voltage.
High-Side Gate-Driver Output for Regulator 2. DH2 swings from LX2 to BST2. DH2 is low before V CC
reaches the UVLO rising threshold voltage.
Boost Flying-Capacitor Connection for Regulator 2. Connect a ceramic capacitor with a minimum value of
100nF between BST2 and LX2.
External Inductor Connection for Regulator 2. Connect LX2 to the switched side of the inductor. LX2 serves
as the lower supply rail for the DH2 high-side gate driver and as sensing input of the synchronous
MOSFET’s V DS drop (drain terminal).
Maxim Integrated
9
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