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| 型号： | MAX15118EWI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 18/23页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 18A 28WLP |
| 产品培训模块： | Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 5.17 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 18A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFBGA，WLBGA |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 28-WLP（3.5x2） |
MAX15118
High-Efficiency, 18A, Current-Mode Synchronous
Step-Down Regulator with Integrated Switches
The peak current-mode controller’s modulator gain is
where:
sC FF R1 + 1
attenuated by the equivalent divider ratio of the load
=
×
G FF (s)
resistance and the current-loop gain. G MOD becomes:
sC C C + 1
1
G MOD MC ×
= g
= 10 AVEA(dB)/20 ×
G EA (s)
? 10 AVEA(dB)/20 ?
1 + × ? ? K S × (1- D) - 0.5 ? ?
f SW x L sC C ? ? + 1
g M
?
?
R2
R1 + R2 sC FF (R1||R2) + 1
R
R LOAD
? ?
where R LOAD = V OUT /I OUT(MAX) , f SW is the switching
frequency, L is the output inductance, D is the duty cycle G FILTER (s) = R LOAD
K S = 1 + SLOPE SW MC
sC OUT ESR + 1
×
?
K S × (1- D) - 0.5 ?
1
G SAMPLING (s) =
s s
( π × f ) 2
where Q C =
(V OUT /V IN ), and K S is the slope compensation factor
calculated as:
V × f × L × g
V IN -V OUT
where V SLOPE = 130mV and g MC = 150A/V.
The power modulator’s dominant pole is a function of the
parallel effects of the load resistance and the current-
loop gain’s equivalent impedance. Assuming that ESR
of the output capacitor is much smaller than the parallel
-1
sC OUT ? + ?
? 2 π × R LOAD 2 π × f SW × L ?
1
2
+
SW π × f SW × Q C
1
π × [K S × (1- D) - 0.5]
+ 1
+ 1
combination of the load and the current loop, f PMOD can
be calculated as:
The dominant poles and zeros of the transfer loop gain
are:
1 [K S × (1- D) - 0.5]
f PMOD
=
+
2 π × C OUT × R LOAD 2 π × f SW × L × C OUT
f P1 <<
g M
2 π × C C × 10 AVEA(dB)/20
= f =
f ZMOD ZESR
2 π × C OUT ? ?
+
f P3 = SW
f Z1 =
f Z2 =
The power modulator zero is:
1
2 π × C OUT × ESR
The total system transfer can be written as:
GAIN ( s ) = G FF ( s ) × G EA ( s ) × G MOD ( DC )
× G FILTER ( s ) × G SAMPLING ( s )
f P2 =
? 1 K S × (1- D) - 0.5 ?
1
? R LOAD f SW × L ?
f
2
1
2 π × C C R C
1
2 π × C OUT ESR
-1
The order of pole occurrence is:
f P1 < f P2 < f Z1 < f CO < f P3 < f Z2
???????????????????????????????????????????????????????????????? Maxim Integrated Products 18
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