参数资料
型号: MAX1540AETJ+T
厂商: Maxim Integrated Products
文件页数: 32/49页
文件大小: 0K
描述: IC REG CTRLR DIVIDER PWM 32-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电流模式
输出数: 2
频率 - 最大: 620kHz
占空比: 100%
电源电压: 5.5 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
TO ERROR
AMPLIFIER
FB_
REF
(2.0V)
9R
R
Figure 10. MAX1540A/MAX1541 Dual Mode Feedback Decoder
MAX1540A/MAX1541
OUT_
FIXED OUTPUT
FB = V CC
FIXED OUTPUT
FB = GND
Table 8. Output Voltage Configuration
Dynamic Output Voltages (MAX1541 OUT1 Only)
The MAX1541 regulates FB1 to the voltage set at
OUT1
OUT2
REFIN1. By changing the voltage at REFIN1, the
MAX1540A MAX1541 MAX1540A MAX1541
MAX1541 can be used in applications that require
dynamic output-voltage changes between two set
FB_ = V CC
FB_ = GND
FB_ = OUT_
or adjustable
Fixed 1.2V
Fixed 1.8V
0.7V
Not
allowed
Not
allowed
V REFIN1
Fixed 1.5V
Fixed 2.5V
0.7V
Fixed
1.8V
Fixed
2.5V
0.7V
points. Figure 12 shows a dynamically adjustable resis-
tive voltage-divider network at REFIN1. Using the GATE
signal and open-drain output (OD), a resistor can be
switched in and out of the REFIN1 resistor-divider,
changing the voltage at REFIN1. A logic high on GATE
turns on the internal N-channel MOSFET, forcing OD to
a low-impedance state. A logic low on GATE disables
the N-channel MOSFET, so OD is high impedance. The
two output voltages (FB1 = OUT1) are determined by
= V
V OUT1(LOW) REF ?
?
V OUT1(HIGH) = V REF ?
? R8+(R9+R10) ?
V OUT_ FB_ ? 1 + C ?
= V
Setting V OUT with a Resistive Voltage-Divider at FB_
The output voltage can be adjusted from 0.7V to 5.5V
using a resistive voltage-divider (Figure 11). The
MAX1540A regulates FB1 and FB2 to a fixed 0.7V refer-
ence voltage. The MAX1541 regulates FB1 to the volt-
age set at REFIN1 and regulates FB2 to a fixed 0.7V
reference voltage. This makes the main MAX1541 con-
troller (OUT1) ideal for memory applications where the
termination supply must track the supply voltage. The
adjusted output voltage is:
? R ?
? R D ?
where V FB_ = 0.7V for the MAX1540A, and V FB1 =
V REFIN1 and V FB2 = 0.7V for the MAX1541.
the following equations:
? R9 ?
? R8+R9 ?
? (R9+R10) ?
?
The main MAX1541 controller (OUT1) automatically
enters forced-PWM operation on the rising and falling
edges of GATE, and remains in forced-PWM mode for a
minimum time selected by FBLANK (Table 6). Forced-
PWM operation is required to ensure fast, accurate
negative voltage transitions when REFIN1 is lowered.
Since forced-PWM operation disables the zero-crossing
comparator, the inductor current may reverse under
32
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