参数资料
型号: MAX1632AEAI+
厂商: Maxim Integrated
文件页数: 4/29页
文件大小: 0K
描述: IC REG TRPL BCK/LINEAR 28-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 46
拓扑: 降压(降压)同步(2),线性(LDO)(1)
功能: 任何功能
输出数: 3
频率 - 开关: 200kHz ~ 300kHz
电压/电流 - 输出 1: 控制器
电压/电流 - 输出 2: 控制器
电压/电流 - 输出 3: 12V,120mA
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 4.2 V ~ 30 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
供应商设备封装: 28-SSOP
包装: 管件
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 15V, both PWMs on, SYNC = VL, VL load = 0mA, REF load = 0mA, SKIP = 0V, T A = T MIN to T MAX , unless otherwise noted.
Typical values are at T A = +25°C.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FAULT DETECTION (MAX1630A/MAX1631A/MAX1632A)
Overvoltage Trip Threshold
Overvoltage-Fault Propagation Delay
Output Undervoltage Threshold
Output Undervoltage Lockout Time
Thermal Shutdown Threshold
With respect to unloaded output voltage
CSL_ driven 2% above overvoltage trip threshold
With respect to unloaded output voltage
From each SMPS enabled, with respect to f OSC
Typical hysteresis = +10°C
4
60
5000
7
1.5
70
6144
150
10
80
7000
%
μs
%
Clks
°C
RESET
RESET Trip Threshold
RESET Propagation Delay
RESET Delay Time
With respect to unloaded output voltage,
falling edge; typical hysteresis = 1%
Falling edge, CSL_ driven 2%
below RESET trip threshold
With respect to f OSC
-7
27,000
-5.5
1.5
32,000
-4
37,000
%
μs
Clks
INPUTS AND OUTPUTS
Feedback Input Leakage Current
FB3, FB5; SECFB = 2.6V
1
50
nA
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Logic Output Low Voltage
Logic Output High Current
RUN/ON3, SKIP , TIME/ON5 (SEQ = REF),
SHDN , STEER, SYNC
RUN/ON3, SKIP , TIME/ON5 (SEQ = REF),
SHDN , STEER, SYNC
RUN/ON3, SKIP , TIME/ON5 (SEQ = REF),
SHDN , STEER, SYNC, SEQ; V PIN = 0V or 3.3V
RESET , I SINK = 4mA
RESET = 3.5V
2.4
1
0.6
±1
0.4
V
V
μA
V
mA
TIME/ON5 Input Trip Level
SEQ = 0V or VL
2.4
2.6
V
TIME/ON5 Source Current
TIME/ON5 On-Resistance
Gate Driver Sink/Source Current
Gate Driver On-Resistance
TIME/ON5 = 0V, SEQ = 0V or VL
TIME/ON5; RUN/ON3 = 0V, SEQ = 0V or VL
DL3, DH3, DL5, DH5; forced to 2V
High or low
2.5
3
15
1
1.5
3.5
80
7
μA
Ω
A
Ω
Note 1: Each of the four digital soft-start levels is tested for functionality; the steps are typically in 20mV increments.
Note 2: High duty-factor operation supports low input-to-output differential voltages, and is achieved at a lowered operating
frequency (see Overload and Dropout Operation section).
Note 3: MAX1630A/MAX1632A/MAX1633A/MAX1635A only.
Note 4: Off mode for the 12V linear regulator occurs when the SMPS that has flyback feedback (V DD ) steered to it is disabled. In
situations where the main outputs are being held up by external keep-alive supplies, turning off the 12OUT regulator pre-
vents a leakage path from the output-referred flyback winding, through the rectifier, and into V DD .
Note 5: Since the reference uses VL as its supply, the reference’s V+ line-regulation error is insignificant.
4
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