参数资料
型号: MAX17007AGTI+T
厂商: Maxim Integrated Products
文件页数: 18/35页
文件大小: 0K
描述: IC CTRLR QPWM GRAPHICS 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: Quick-PWM™
应用: 电源
电流 - 电源: 1.7mA
电源电压: 4.5 V ~ 26 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(4x4)
包装: 带卷 (TR)
Dual and Combinable QPWM Graphics
Core Controllers for Notebook Computers
+5V Bias Supply (V CC , V DD )
The MAX17007/MAX17008 require an external 5V bias
supply in addition to the battery. Typically, this 5V bias
supply is the notebook’s 95%-efficient 5V system sup-
ply. Keeping the bias supply external to the IC improves
efficiency and eliminates the cost associated with the 5V
linear regulator that would otherwise be needed to sup-
ply the PWM circuit and gate drivers. If stand-alone
capability is needed, the 5V supply can be generated
with an external linear regulator such as the MAX1615.
The 5V bias supply powers both the PWM controllers
and internal gate-drive power, so the maximum current
drawn depends on the external MOSFET’s gate capaci-
tance, and the selected switching frequency:
I BIAS = I Q + f SW1 Q G(SMPS1) + f SW2 Q G(SMPS2)
= 4mA to 40mA (typ)
Bypass V CC with a 1μF or greater ceramic capacitor to
the analog ground. Bypass V DD with a 2.2μF or greater
2V Reference
The 2V reference is accurate to ±1% over temperature
and load, making REF useful as a precision system ref-
erence. Bypass REF to GND with a 2.2nF. The refer-
ence sources up to 100μA and sinks 10μA to support
external loads.
Combined-Mode Operation (FB2 = V CC )
Combined-mode operation allows the MAX17007/
MAX17008 to support even higher output currents by
sharing the load current between two phases, distribut-
ing the power dissipation over several power compo-
nents to improve the efficiency. The MAX17007/
MAX17008 are configured in combined mode by con-
necting FB2 to V CC . See Figure 2 for the combined-
mode standard application circuit.
Table 3 lists the pin function differences between com-
bined mode and separate mode. See the Pin Description
table for additional details.
ceramic capacitor to the power ground. V CC and V DD
should be separated with a 10 ? resistor (Figure 1).
Table 3. Pin Function in Combined and Separate Modes
PIN
FB2
COMBINED MODE
Connect to V CC to configure MAX17007/MAX17008 for
combined-mode operation
SEPARATE MODE
Connect to REF for preset 1.5V, or use a resistor-
divider to set the SMPS2 output voltage
REFIN1
Sets the combined output voltage—dynamic, fixed, and Sets the SMPS1 output voltage—dynamic, fixed,
preset voltages supported and preset voltages supported
EN1
EN2
PGOOD1
PGOOD2
TON1
TON2
ILIM1
ILIM2 (CCI)
SKIP
Enables/disables combined output
Not used; connect to GND
Power-good indicator for combined output voltage
Not used; can be left open
Sets the per-phase switching frequency for both SMPSs
Use the same resistor as TON1
Sets the per-phase current limit for both SMPSs
Current-balance integrator output; connect a capacitor
from CCI to the output
Only three distinct modes of operation; ultrasonic mode
not supported
Enables/disables SMPS1
Enables/disables SMPS2
Power-good indicator for SMPS1
Power-good indicator for SMPS2
Sets the switching frequency for SMPS1
Sets the switching frequency for SMPS2
Sets SMPS1 current limit
Sets SMPS2 current limit
Supports all four modes of operation
18
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