参数资料
型号: MAX17085GTL+
厂商: Maxim Integrated Products
文件页数: 21/38页
文件大小: 0K
描述: IC CHARGER/CTLR/LDO REG 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
功能: 充电管理
电池化学: 多化学
电源电压: 4.5 V ~ 24 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(5x5)
包装: 托盘
Integrated Charger, Dual Main Step-Down
Controllers, and Dual LDO Regulators
Thermal-Fault Protection (t SHDN )
The MAX17085B features a thermal fault-protection cir-
cuit. When the junction temperature rises above +160 N C,
a thermal sensor activates the fault latch, pulls PGOOD
low, enables the 20 I discharge circuit, and disables
the controller—DH and DL pulled low. After the junction
temperature cools by 50 N C, the controller automatically
restarts. This protects the internal LDO when a sustained
overcurrent or output short circuit occurs.
POR, UVLO
When V CC rises above the power-on reset (POR) thresh-
old, the MAX17085B clears the fault latches and resets
the soft-start circuit, preparing the controller for power-up.
However, the V CC undervoltage-lockout (UVLO) circuitry
inhibits switching until V CC reaches its 4.2V (typ) UVLO
threshold.
When V CC drops below the UVLO threshold (falling
edge), the controller stops switching, pulling DH and
DL low. When the 1.5V POR falling edge threshold is
reached, the DL state no longer matters since there is
not enough voltage to force the switching MOSFETs
into a low on-resistance state, so the controller pulls DL
high, allowing a soft discharge of the output capaci-
tors (damped response). However, if the V CC recovers
before reaching the falling POR threshold, DL remains
low until the error comparator has been properly pow-
ered up and triggers an on-time.
When DCIN is high enough for LDO5 to be in regulation
and V CC to be above its UVLO, the main SMPS can begin
running. Charger operation requires DCIN to be above its
7.7V UVLO threshold.
IINP
CSSP
CSSN
CURRENT-
SENSE AMP
PDSL
CHARGE
PUMP
ON3
ILIM3
DH3
BATT
DHC
TOFF
BLOCK
LDO5
ACOV
DCIN
SKIP
SMPS3 DRIVER
BLOCK
BST3
LX3
DL3
OUT3
BSTC
LXC
DLC
CC
CSIP
CSIN
DRIVER
CURRENT-
SENSE
AMP
LVC
BLOCK
MAX17085B
LDO3
LDO5
LDO3
DCIN
LDO5
ISET
VCTL
CELLS
ACIN
VBATT
TON ADJUST
TON
BLOCK
OUT5
FB
TON
OUT5
ON5
ACOK
V CC
REF
GND
AC
COMP
REF
ACOV
LDO5
SKIP
REF
DRIVER
DH5
BST5
LX5
DL5
ILIM5
SKIP
Figure 2. Functional Diagram
PAD
OUT5
OUT3
PGOOD
LOGIC
PGOOD
______________________________________________________________________________________
21
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