参数资料
型号: MAX17510ATB+T
厂商: Maxim Integrated Products
文件页数: 12/13页
文件大小: 0K
描述: IC REG DDR LOW VOLTAGE 10-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 转换器,DDR
输入电压: 1.1 V ~ 3.6 V
输出数: 1
输出电压: 0.5 V ~ 1.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
供应商设备封装: 10-TDFN-EP(3x3)
包装: 带卷 (TR)
Low-Voltage DDR Linear Regulators
Noise, PSRR, and Transient Response
The MAX1510/MAX17510 operate with low-dropout
voltage and low quiescent current in notebook comput-
ers while maintaining good noise, transient response,
and AC rejection specifications. Improved supply-noise
rejection and transient response can be achieved by
increasing the values of the input and output capaci-
tors. Use passive filtering techniques when operating
from noisy sources.
The MAX1510/MAX17510 load-transient response
graphs (see the Typical Operating Characteristics) show
two components of the output response: a DC shift from
the output impedance due to the load-current change
and the transient response. A typical transient response
for a step change in the load current from -1.5A to
+1.5A is 10mV. Increasing the output capacitor’s value
and decreasing the ESR attenuate the overshoot.
PCB Layout Guidelines
The MAX1510/MAX17510 require proper layout to
achieve the intended output power level and low noise.
Proper layout involves the use of a ground plane,
appropriate component placement, and correct routing
of traces using appropriate trace widths. Refer to the
MAX1510 evaluation kit for a layout example:
? Minimize high-current ground loops. Connect the
ground of the device, the input capacitor, and the
output capacitor together at one point.
? To optimize performance, a ground plane is essen-
tial. Use all available copper layers in applications
where the device is located on a multilayer board.
? Connect the input filter capacitor less than 10mm
from IN. The connecting copper trace carries large
currents and must be at least 2mm wide, preferably
5mm wide.
? Connect the backside pad to a large ground plane.
Use as much copper as necessary to decrease the
thermal resistance of the device. In general, more
copper provides better heatsinking capabilities.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages . Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
10 TDFN
PACKAGE
CODE
T1033+1
OUTLINE
NO.
LAND
12
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