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参数资料
| 型号： | MAX17510ATB+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 3/13页 |
| 文件大小： | 0K |
| 描述： | IC REG DDR LOW VOLTAGE 10-TDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 转换器，DDR |
| 输入电压： | 1.1 V ~ 3.6 V |
| 输出数： | 1 |
| 输出电压： | 0.5 V ~ 1.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 供应商设备封装： | 10-TDFN-EP（3x3） |
| 包装： | 带卷 (TR) |
Low-Voltage DDR Linear Regulators
ELECTRICAL CHARACTERISTICS (continued)
(V IN = 1.8V, V CC = 3.3V, V REFIN = V OUTS = 1.25V, SHDN = V CC , circuit of Figure 1, T J = T A = -40 ° C to +85 ° C for MAX1510ETB, T J =
T A = -40 ° C to +125 ° C for MAX17510ATB, unless otherwise noted. Typical values are at T A = +25 ° C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
REFERENCE
REFIN Voltage Range
V REFIN
0.5
1.5
V
REFIN Input-Bias Current
REFIN Undervoltage-Lockout
Voltage
I REFIN
T A = +25°C
Rising edge, hysteresis = 50mV
-1
0.35
+1
0.45
μA
V
REFOUT Voltage
REFOUT Load Regulation
V REFOUT
Δ V REFOUT
V CC = 3.3V, I REFOUT = 0V
I REFOUT = ± 5mA
V REFIN
- 0.01
-20
V REFIN
V REFIN
+ 0.01
+20
V
mV
FAULT DETECTION
Thermal-Shutdown Threshold
T SHDN
Rising edge, hysteresis = 15°C
+165
°C
V CC Undervoltage-Lockout
Threshold
IN Undervoltage-Lockout
Threshold
Current-Limit Threshold
V UVLO
I LIMIT
Rising edge, hysteresis = 100mV
Rising edge, hysteresis = 55mV
T A = -40°C to +85°C
T A = -40°C to +125°C
2.45
1.8
1.5
2.55
0.9
3
3
2.65
1.1
4.2
4.2
V
V
A
Soft-Start Current-Limit Time
t SS
200
μs
INPUTS AND OUTPUTS
PGOOD Lower Trip Threshold
PGOOD Upper Trip Threshold
With respect to feedback threshold,
hysteresis = 12mV
With respect to feedback threshold,
hysteresis = 12mV
-200
100
-150
150
-100
200
mV
mV
PGOOD Propagation Delay
PGOOD Startup Delay
t PGOOD
OUTS forced 25mV beyond PGOOD trip
threshold
Startup rising edge, OUTS within ± 100mV of
the feedback threshold
5
1
10
2
35
3.5
μs
ms
PGOOD Output Low Voltage
I SINK = 4mA
0.3
V
PGOOD Leakage Current
I PGOOD
OUTS = REFIN (PGOOD high impedance),
PGOOD = V CC + 0.3V, T A = +25°C
1
μA
SHDN Logic Input Threshold
SHDN Logic Input Current
Logic-high
Logic-low
SHDN = V CC or GND, T A = +25°C
0.8
-1
2.0
+1
V
V
μA
Note 1: Limits are 100% production tested at T A = +25 ° C. Limits over the operating temperature range are guaranteed through cor-
relation using statistical-quality-control (SQC) methods.
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