参数资料
型号: MAX1802EHJ+
厂商: Maxim Integrated Products
文件页数: 21/28页
文件大小: 0K
描述: IC PWR SPLY STEP DOWN 32-TQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 360
应用: 控制器,数字式相机
输入电压: 2.5 V ~ 11 V
输出数: 5
输出电压: 1.25 V ~ 5.5 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-TQFP
供应商设备封装: 32-TQFP(5x5)
包装: 托盘
Digital Camera Step-Down
Power Supply
the N-channel turn-off current (equal to 17mV/R DSN ).
Choose R DSN value between R DSP and 3R DSP to keep
the N-channel turn-off current low for optimal efficiency.
If a lower R DSN is used, connect a Schottky diode from
PGNDM to LXM for better efficiency (see Diode
Selection ).
For the main converter, the external gate drive swings
between the voltage at VDDM and GND. For the auxil-
iary controllers, the external gate drive swings between
the voltage at VDDC and GND. Use a MOSFET whose
on-resistance is specified at or below the minimum
gate drive voltage swing, and make sure that the maxi-
mum voltage swing does not exceed the maximum
gate-source voltage specification of the MOSFET. The
gate charge, Q g , includes all capacitance associated
with gate charging and helps to predict the transition
time required to drive the MOSFET between on and off
states. The power dissipated in the MOSFET is due to
R DS(ON) and transition losses. The R DS(ON) loss is:
P 1 ≈ D I L 2 R DS(ON)
where D is the duty cycle, I L is the average inductor
current, and R DS(ON) is the on-resistance of the MOS-
FET. The transition loss is approximately:
high-temperature applications, use ultra-fast junction
rectifiers.
Compensation Design
Each DC-DC converter has an internal transconduc-
tance error amplifier whose output is used to compen-
sate the control loop. Typically, a series resistor and
capacitor are inserted from COMP_ to GND to form a
pole-zero pair. The external inductor, the output capac-
itor, the compensation resistor and capacitor, and for
the main converter, the external P-channel MOSFET,
govern control-loop stability. The inductor and output
capacitor are usually chosen in consideration of perfor-
mance, size, and cost, but the compensation resistor
and capacitor are chosen to optimize control-loop sta-
bility. The component values in the circuit of Figure 1
yield stable operation over a broad range of input/out-
put voltages and converter switching frequencies.
Follow the procedures below for optimal compensation.
In the following descriptions, Bode plots are used to
graphically describe the loop response of the convert-
ers over frequency. The Bode plot shows loop gain and
phase vs. frequency. A single pole results in a -20dB
per decade slope and a -90 ° phase shift, and a single
zero results in a +20dB per decade slope and a +90 °
P 2 ≈
V SWING I L f OSC t T
3
phase shift. The stability of the system can be deter-
mined by the phase margin (how far from 0 ° the loop
phase is when the response drops to 0dB) and gain
where V SWING is V OUT for the auxiliary controllers or
V IN(MAX) for the main and core converters, I L is the
average inductor current, f OSC is the converter switch-
ing frequency, and t T is the transition time. The transi-
tion time is approximately Q g / I G , where Q g is the total
gate charge, and I G is the gate drive current (0.4A typ).
The total power dissipation in the MOSFET is
P MOSFET = P 1 + P 2 .
Diode Selection
The main and core converters use synchronous recti-
fiers and thus do not require a diode. However, if the
external N-channel synchronous rectifier has low on-
resistance (less than the P-channel on-resistance), the
high N-channel turn-off current results in lower efficien-
cy. In that case, connect a Schottky diode, rated for
maximum output current, from PGNDM to LXM to
improve efficiency.
The auxiliary controllers require external rectifiers. For
low-output-voltage applications, use a Schottky diode
to rectify the output voltage because of the diode ’ s low
forward voltage and fast recovery time. Schottky diodes
exhibit significant leakage current at high reverse volt-
ages and high temperatures. Thus, for high-voltage,
margin (how far below 0dB the gain is when the phase
reaches 0 ° ). The system is stable for phase margins
>30 ° , and a phase margin of 45 ° is preferred. The gain
margin should be at least 10dB.
Main Converter
The main converter uses current mode to regulate the
output voltage by forcing the required current through
the inductor. Since the P-channel MOSFET operates
with constant drain-source on-resistance (R DSP ), the
voltage across the MOSFET is proportional to the
inductor current. The converter current-sense amplifier
measures the “ on ” MOSFET drain-source voltage to
determine the inductor current for regulation. The gain
through the current-sense amplifier (measured across
the MOSFET) is A VCSM = 9.3V/V. The voltage-divider
attenuates the loop gain by A VDV = V REF / V OUT , and
the gain DC voltage of the error amplifier is A VEA =
2000V/V. The controller forces the peak inductor cur-
rent (I L ) such that:
I L R DSP A VCSM = V OUT A VDV A VEA
or
I L = V OUT A VDV A VEA / (A VCSM R DSP )
______________________________________________________________________________________
21
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