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| 型号： | MAX1809ETI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 8/17页 |
| 文件大小： | 0K |
| 描述： | IC DDR TERMINATION 28-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 转换器，DDR |
| 输入电压： | 3 V ~ 5.5 V |
| 输出数： | 1 |
| 输出电压： | 1.1 V ~ 5.5 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
3A, 1MHz, DDR Memory Termination Supply
where C = 2.5nF and f SW is the switching frequency.
Resistive losses in the two power switches are approxi-
mated by:
P D(RES) = I OUT 2 ? R PMOS
where R PMOS is the on-resistance of the PMOS switch.
The junction-to-ambient thermal resistance required to
dissipate this amount of power is calculated by:
θ JA = (T J,MAX - T A,MAX ) / (P D(CAP) + P D(RES) )
where:
θ JA = junction-to-ambient thermal resistance
T J,MAX = maximum junction temperature
T A,MAX = maximum ambient temperature
Design Procedure
For typical applications, use the recommended compo-
nent values in Figure 1. For other applications, take the
following steps:
1) Select the desired PWM-mode switching frequency.
See Figure 4 for maximum operating frequency.
2) Select the constant off-time as a function of input
voltage, output voltage, and switching frequency.
3) Select R TOFF as a function of off-time.
Setting the Output Voltage
The output voltage of the MAX1809 is set by an external
voltage applied to the EXTREF pin. This can come directly
from another voltage source or external reference.
As an active termination supply in DDR applications
(see Active Bus Termination in the Applications
Information section), the output of the MAX1809 is reg-
ulated at half the DDR supply voltage. In mobile sys-
tems, the DDR supply voltage is 2.5V, and the
termination voltage is 1.25V ±40mV. To regulate to
1.25V, an external divide-by-2 resistor network is
placed across the DDR supply voltage to generate
1.25V. This 1.25V is connected to EXTREF, which sets
the output voltage of the MAX1809. When FB is directly
tied to the output (Figure 5), the output voltage range is
limited by the external reference ’ s input voltage limits
(see EC table). External reference may not be set within
1.7V of the minimum supply voltage. V EXTREF should
be limited to less than 1.4V for 3.3V input voltage.
Failure to comply can cause the part to operate abnor-
mally and may cause part damage.
Alternatively, the output can be adjusted up to V IN by
connecting FB to a resistor-divider between the output
voltage and ground (Figure 6). Use 50k ? for R1. R2 is
given by:
R 2 = R 1 ?
? 1 ?
4) Select the inductor as a function of output voltage,
off-time, and peak-to-peak inductor current.
SS
0.01 μ F
? V OUT
? V EXTREF
?
?
V IN
2.2 μ F
V CC
MAX1809
CURRENT
SENSE
FB
IN
C IN
CERAMIC
V IN
(3.0V TO 5.5V)
PWM LOGIC
EXTREF
SHDN
REF
REF
TIMER
AND
DRIVERS
LX
L
C OUT
1 μ F
Figure 2. Functional Diagram
GND
R TOFF
PGND
8
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