参数资料
型号: MAX1845ETX+T
厂商: Maxim Integrated Products
文件页数: 9/27页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 36-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电流模式
输出数: 2
频率 - 最大: 540kHz
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 36-WFQFN 裸露焊盘
包装: 带卷 (TR)
Dual, High-Efficiency, Step-Down
Controller with Accurate Current Limit
Pin Description (continued)
PIN
NAME
FUNCTION
QSOP
QFN
7
3
PGOOD
Power-Good Open-Drain Output. PGOOD is low when either output voltage is off or is more than
10% above or below the normal regulation point.
Overvoltage Protection Threshold. An overvoltage fault occurs if the voltage on FB1 or FB2 is
8
4
OVP
greater than the programmed overvoltage trip threshold. Adjustment range is 1V (100%) to 1.8V
(180%). Connect OVP to GND to set the default overvoltage threshold of 114% of nominal.
Connect to V CC to disable OVP and clear the OVP latch.
Undervoltage Protection Threshold. An undervoltage fault occurs if the voltage on FB1 or FB2 is less
9
5
UVP
than the undervoltage trip threshold (70% of nominal). Connect UVP to V CC to enable undervoltage
protection. Connect to GND to disable undervoltage protection and clear the UVP latch.
10
11
12
7
8
11
REF
ON1
ON2
+2.0V Reference Voltage Output. Bypass to GND with 0.22μF (min) capacitor. Can supply 50μA
for external loads.
OUT1 ON/ OFF Control Input. Connect to AGND to turn OUT1 off. Connect to V CC to turn OUT1 on.
OUT2 ON/ OFF Control Input. Connect to AGND to turn OUT2 off. Connect to V CC to turn OUT2 on.
Current-Limit Threshold Adjustment for OUT2. The current-limit threshold at CS2 is 0.1 times the
13
12
ILIM2
voltage at ILIM2. Connect a resistor-divider network from REF to set the current-limit threshold
between 25mV and 250mV (with 0.25V to 2.5V at ILIM). Connect to V CC to assert 50mV default
current-limit threshold.
14
13
FB2
Feedback Input for OUT2. Connect to GND for 2.5V fixed output, or connect to a resistor-divider
network from OUT2 for an adjustable output between 1V and 5.5V.
Output Voltage Connection for the OUT2 PWM. Connect directly to the junction of the external
15
14
OUT2
inductor and output filter capacitors. OUT2 senses the output voltage to determine the on-time
and also serves as the feedback input in fixed-output modes.
Current-Sense Input for OUT2. CS2 is the input to the current-limiting circuitry for valley current
16
15
CS2
limiting. For lowest cost and highest efficiency, connect to LX2. For highest accuracy, use a sense
resistor. See the Current-Limit Circuit (ILIM_) section.
17
18
16
18
LX2
DH2
External Inductor Connection for OUT2. Connect to the switched side of the inductor. LX2 serves
as the internal lower supply voltage rail for the DH2 high-side gate driver.
High-Side Gate Driver Output for OUT2. Swings from LX2 to BST2.
Boost Flying Capacitor Connection for OUT2. Connect to an external capacitor and diode
19
19
BST2
according to the standard application circuit in Figure 1. See MOSFET Gate Drivers (DH_, DL_)
section.
20
21
22
23
20
21
22
DL2
V DD
V CC
GND
Low-Side Gate-Driver Output for OUT2. DL2 swings from PGND to V DD .
Supply Input for the DL Gate Drivers. Connect to system supply voltage, +4.5V to +5.5V. Bypass
to PGND with a low-ESR 4.7μF capacitor.
Analog Supply Input. Connect to system supply voltage, +4.5V to +5.5V, with a 20 Ω series
resistor. Bypass to AGND with a 1μF capacitor.
Ground. Combined analog and power ground. Serves as negative input for CS_ amplifiers.
_______________________________________________________________________________________
9
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