参数资料
型号: MAX1858EEG+T
厂商: Maxim Integrated Products
文件页数: 10/21页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 24-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 2
频率 - 最大: 660kHz
占空比: 90%
电源电压: 4.75 V ~ 23 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
Dual 180° Out-of-Phase PWM Step-Down
Controller with Power Sequencing and POR
High-Side Gate-Drive Supply (BST_)
Gate-drive voltages for the high-side N-channel switch-
es are generated by the flying-capacitor boost circuits
(Figure 3). A boost capacitor (connected from BST_ to
LX_) provides power to the high-side MOSFET driver.
On startup, the synchronous rectifier (low-side
MOSFET) forces LX_ to ground and charges the boost
capacitor to 5V. On the second half-cycle, after the low-
side MOSFET turns off, the high-side MOSFET is turned
on by closing an internal switch between BST_ and
DH_. This provides the necessary gate-to-source volt-
age to turn on the high-side switch, an action that
boosts the 5V gate-drive signal above V IN . The current
required to drive the high-side MOSFET gates
(f SWITCH ? Q G ) is ultimately drawn from V L .
MOSFET Gate Drivers (DH_, DL_)
The DH and DL drivers are optimized for driving moder-
ate-size N-channel high-side, and larger low-side power
MOSFETs. This is consistent with the low duty factor seen
with large V IN - V OUT differential. The DL_ low-side drive
waveform is always the complement of the DH_ high-side
drive waveform (with controlled dead time to prevent
cross-conduction or “ shoot-through ” ). An adaptive dead-
time circuit monitors the DL_ output and prevents the
high-side FET from turning on until DL_ is fully off. There
must be a low-resistance, low-inductance path from the
DL_ driver to the MOSFET gate in order for the adaptive
dead-time circuit to work properly. Otherwise, the sense
circuitry in the MAX1858 interprets the MOSFET gate as
“ off ” while there is actually charge still left on the gate.
Use very short, wide traces (50mils to 100mils wide if the
MOSFET is 1in from the device). The dead time at the
DH-off edge is determined by a fixed 30ns internal delay.
Synchronous rectification reduces conduction losses in
the rectifier by replacing the normal low-side Schottky
catch diode with a low-resistance MOSFET switch.
Additionally, the MAX1858 uses the synchronous rectifi-
er to ensure proper startup of the boost gate-driver cir-
cuit and to provide the current-limit signal.
The internal pulldown transistor that drives DL_ low is
robust, with a 0.5 ? (typ) on-resistance. This low on-
resistance helps prevent DL_ from being pulled up dur-
ing the fast rise-time of the LX_ node, due to capacitive
coupling from the drain to the gate of the low-side syn-
chronous-rectifier MOSFET. However, for high-current
applications, some combinations of high- and low-side
FETs can cause excessive gate-drain coupling, leading
to poor efficiency, EMI, and shoot-through currents.
This can be remedied by adding a resistor (typically
less than 5 ? ) in series with BST_, which increases the
turn-on time of the high-side FET without degrading the
turn-off time (Figure 3).
Current-Limit Circuit (ILIM_)
The current-limit circuit employs a “ valley ” current-
sensing algorithm that uses the on-resistance of the
low-side MOSFET as a current-sensing element. If the
current-sense signal is above the current-limit thresh-
old, the MAX1858 does not initiate a new cycle (Figure
4). Since valley current sensing is employed, the actual
peak current is greater than the current-limit threshold
by an amount equal to the inductor ripple current.
Therefore, the exact current-limit characteristic and
maximum load capability are a function of the low-side
MOSFET ’ s on-resistance, current-limit threshold, induc-
tor value, and input voltage. The reward for this uncer-
tainty is robust, lossless overcurrent sensing that does
not require costly sense resistors.
The adjustable current limit accommodates MOSFETs
with a wide range of on-resistance characteristics (see
the Design Procedure section). The current-limit thresh-
old is adjusted with an external resistor at ILIM_ (Figure
1). The adjustment range is from 50mV to 300mV, cor-
responding to resistor values of 100k ? to 600k ? . In
adjustable mode, the current-limit threshold across the
low-side MOSFET is precisely 1/10th the voltage seen
at ILIM_. However, the current-limit threshold defaults
to 100mV when ILIM is tied to V L . The logic threshold
for switchover to this 100mV default value is approxi-
mately V L - 0.5V. Adjustable foldback current limit
reduces power dissipation during short-circuit condi-
tions (see the Design Procedure section).
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the cur-
rent-sense signals seen by LX_ and PGND. The IC
must be mounted close to the low-side MOSFET with
short, direct traces making a Kelvin sense connection
so that trace resistance does not add to the intended
sense resistance of the low-side MOSFET.
Undervoltage Lockout and Startup
If V L drops below 4.5V, the MAX1858 assumes that the
supply and reference voltages are too low to make
valid decisions and activates the undervoltage lockout
(UVLO) circuitry which forces DL and DH low to inhibit
switching. RST is also forced low during UVLO. After V L
rises above 4.5V, the controller powers up the outputs.
Enable (EN), Soft-Start, and Soft-Stop
Pull EN high to enable or low to shutdown both regula-
tors. During shutdown the supply current drops to 1mA
(max), LX enters a high-impedance state (DH_ con-
nected to LX_, and DL_ connected to PGND), and
COMP_ is discharged to GND through a 17 ? resistor.
V L and REF remain active in shutdown. For “ always-on ”
operation, connect EN to V L .
10
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