参数资料
型号: MAX19516ETM+T
厂商: Maxim Integrated Products
文件页数: 10/35页
文件大小: 0K
描述: IC ADC 10BIT 2CH 100MSPS 48TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 10
采样率(每秒): 100M
数据接口: 串行,并联
转换器数目: 2
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(7x7)
包装: 带卷 (TR)
输入数目和类型: 4 个单端,单极;2 个差分,单极
MAX19516
Dual-Channel, 10-Bit, 100Msps ADC
18
______________________________________________________________________________________
HPS_SHDN0
STBY_SHDN0
CHA_ON_SHDN0
CHB_ON_SHDN0
SHDN INPUT = 0*
HPS_SHDN1
STBY_SHDN1
CHA_ON_SHDN1
CHB_ON_SHDN1
SHDN INPUT = 1**
X
0
Complete power-down
0
1
Channel B active, channel A full power-down
0
1
0
Channel A active, channel B full power-down
0
X
1
Channels A and B active
0
1
0
Channels A and B in standby mode
0
1
0
1
Channel B active, channel A standby
0
1
0
Channel A active, channel B standby
1
0
Channels A and B in standby mode
1
X
1
Channels A and B active, output is averaged
1
X
1
X
Channels A and B active, output is averaged
Control Bits:
Output Format (01h)
In addition to power management, the HPS_SHDN1
and HPS_SHDN0 activate an A+B adder mode. In this
mode, the results from both channels are averaged.
The MUX_CH bit selects which bus the (A+B)/2 data is
presented.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
0
BIT_ORDER_B
BIT_ORDER_A
MUX_CH
MUX
0
*
HPS_SHDN0, STBY_SHDN0, CHA_ON_SHDN0, and CHB_ON_SHDN0 are active when SHDN = 0.
**
HPS_SHDN1, STBY_SHDN1, CHA_ON_SHDN1, and CHB_ON_SHDN1 are active when SHDN = 1.
X = Don’t care.
Note: When HPS_SHDN_ = 1 (A+B adder mode), CHA_ON_SHDN_ and CHB_ON_SHDN_ must BOTH equal 0 for power-down or
standby.
Bit 7, 6, 5
Set to 0 for proper operation
Bit 4
BIT_ORDER_B: Reverse CHB output bit order
0 = Defined data bus pin order (default)
1 = Reverse data bus pin order
Bit 3
BIT_ORDER_A: Reverse CHA output bit order
0 = Defined data bus pin order (default)
1 = Reverse data bus pin order
Bit 2
MUX_CH: Multiplexed data bus selection
0 = Multiplexed data output on CHA (CHA data presented first, followed by CHB data) (default)
1 = Multiplexed data output on CHB (CHB data presented first, followed by CHA data)
Bit 1
MUX: Digital output mode
0 = Dual data bus output mode (default)
1 = Single multiplexed data bus output mode
MUX_CH selects the output bus
Bit 0
Set to 0 for proper operation
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