- 您现在的位置：买卖IC网 > PDF目录2009 > MAX19516ETM+T (Maxim Integrated Products)IC ADC 10BIT 2CH 100MSPS 48TQFN PDF资料下载
参数资料
| 型号： | MAX19516ETM+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 5/35页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 2CH 100MSPS 48TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 位数： | 10 |
| 采样率（每秒）： | 100M |
| 数据接口： | 串行，并联 |
| 转换器数目： | 2 |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（7x7） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个单端，单极；2 个差分，单极 |
第1页第2页第3页第4页当前第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页
MAX19516
Dual-Channel, 10-Bit, 100Msps ADC
______________________________________________________________________________________
13
Detailed Description
The MAX19516 uses a 10-stage, fully differential,
pipelined architecture (Figure 1) that allows for high-
speed conversion while minimizing power consump-
tion. Samples taken at the inputs move progressively
through the pipeline stages every half clock cycle.
From input to output the total latency is 9 clock cycles.
Each pipeline converter stage converts its input voltage
to a digital output code. At every stage, except the last,
the error between the input voltage and the digital out-
put code is multiplied and passed on to the next
pipeline stage. Digital error correction compensates for
ADC comparator offsets in each pipeline stage and
ensures no missing codes. Figure 2 shows the
MAX19516 functional diagram.
Analog Inputs and Common-Mode
Reference
Apply the analog input signal to the analog inputs
(INA+/INA- or INB+/INB-), which are connected to the
input sampling switch (Figure 3). When the input sam-
pling switch is closed, the input signal is applied to the
sampling capacitors through the input switch resistance.
The input signal is sampled at the instant the input
switch opens. The pipeline ADC processes the sampled
voltage and the digital output result is available 9 clock
cycles later. Before the input switch is closed to begin
the next sampling cycle, the sampling capacitors are
reset to the input common-mode potential.
Common-mode bias can be provided externally or
internally through 2k
resistors. In DC-coupled applica-
tions, the signal source provides the external bias and
the bias current. In AC-coupled applications, the input
current is supplied by the common-mode input voltage.
For example, the input current can be supplied through
the center tap of a transformer secondary winding.
Alternatively, program the appropriate internal register
through the serial-port interface to supply the input DC
current through internal 2k
resistors (Figure 3). When
the input current is supplied through the internal resis-
tors, the input common-mode potential is reduced by
the voltage drop across the resistors. The common-
mode input reference voltage can be adjusted through
programmable register settings from 0.45V to 1.35V in
0.15V increments. The default setting is 0.90V. Use this
feature to provide a common-mode output reference to
a DC-coupled driving circuit.
Pin Description (continued)
PIN
NAME
FUNCTION
40
D7A
Channel A Three-State Digital Output, Bit 7
41
D8A
Channel A Three-State Digital Output, Bit 8
42
D9A
Channel A Three-State Digital Output, Bit 9 (MSB)
43
DORA
Channel A Data Over Range
44
DCLKA
Channel A Data Clock
45
SDIN/FORMAT
SPI Data Input/Format. Serial-data input when
SPEN is low. Output data format when SPEN is high.
46
SCLK/DIV
Serial Clock/Clock Divider. Serial clock when
SPEN is low. Clock divider when SPEN is high.
47
CS/OUTSEL
Serial-Port Select/Data Output Mode. Serial-port select when
SPEN is low. Data output mode
selection when
SPEN is high.
—EP
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance.
MAX19516
Σ
+
DIGITAL ERROR CORRECTION
FLASH
ADC
x2
DAC
STAGE 2
IN_+
IN_-
STAGE 1
STAGE 9
STAGE 10
END OF PIPELINE
D0_ THROUGH D9_
Figure 1. Pipeline Architecture—Stage Blocks
相关PDF资料 |
PDF描述 |
|---|---|
| MAX19700ETM+T | IC ANLG FRNT END 48-TQFN |
| MAX19705ETM+ | IC ANLG FRNT END 48-TQFN |
| MAX19706ETM+T | IC ANLG FRNT END 48-TQFN |
| MAX19707ETM+T | IC ANLG FRNT END 48-TQFN |
| MAX19708ETM+ | IC ANLG FRONT END 11MSPS 48-TQFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX19516EVKIT+ | 功能描述:数据转换 IC 开发工具 MAX19505-07/15-17 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| MAX19517ETM+ | 功能描述:模数转换器 - ADC 10-Bit 2Ch 130Msps 1.8V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX19517ETM+T | 功能描述:模数转换器 - ADC 10-Bit 2Ch 130Msps 1.8V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX19517EVKIT+ | 功能描述:数据转换 IC 开发工具 MAX19517 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| MAX1951AESA+ | 功能描述:直流/直流开关调节器 1MHz 2A 2.6-5.5V PWM DC/DC Step-Down RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
发布紧急采购，3分钟左右您将得到回复。