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参数资料
| 型号： | MAX2112CTI+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 9/19页 |
| 文件大小： | 0K |
| 描述： | IC TUNER DIR-CONV DVB-S2 28-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 频率： | 925MHz ~ 2.175GHz |
| 应用： | 数字 TV，CATV，机顶盒 |
| 电流 - 接收： | 100mA |
| 数据接口： | PCB，表面贴装 |
| 天线连接器： | PCB，表面贴装 |
| 电源电压： | 3.13 V ~ 3.47 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
MAX2112
Complete, Direct-Conversion
Tuner for DVB-S2 Applications
Pin Description (continued)
PIN
26
27
28
—
NAME
SDA
SCL
ADDR
EP
FUNCTION
2-Wire Serial-Data Interface. Requires ≥ 1k ? pullup resistor to V CC .
2-Wire Serial-Clock Interface. Requires ≥ 1k ? pullup resistor to V CC .
Address. Must be connected to either ground (logic 0) or supply (logic 1).
Exposed Paddle. Solder evenly to the board’s ground plane for proper operation.
Detailed Description
Register Description
The MAX2112 includes 12 user-programmable regis-
ters and 2 read-only registers. See Table 1 for register
Table 1. Register Configuration
MSB
configurations. The register configuration of Table 1
shows each bit name and the bit usage information for all
registers. Note that all registers must be written after and
no earlier than 100μs after the device is powered up.
LSB
REG
NUMBER
REGISTER READ/ REG
NAME WRITE ADDRESS
DATA BYTE
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
1
2
3
4
5
N-Divider
MSB
N-Divider
LSB
Charge
Pump
F-Divider
MSB
F-Divider
LSB
Write
Write
Write
Write
Write
0x00
0x01
0x02
0x03
0x04
FRAC
1
N[7]
CPMP[1]
0
F[15]
F[7]
N[14]
N[6]
CPMP[0]
0
F[14]
F[6]
N[13]
N[5]
CPLIN[1]
0
F[13]
F[5]
N[12]
N[4]
CPLIN[0]
1
F[12]
F[4]
N[11]
N[3]
F[19]
F[11]
F[3]
N[10]
N[2]
F[18]
F[10]
F[2]
N[9]
N[1]
F[17]
F[9]
F[1]
N[8]
N[0]
F[16]
F[8]
F[0]
XTAL
6
Divider
Write
0x05
XD[2]
XD[1]
XD[0]
R[4]
R[3]
R[2]
R[1]
R[0]
R-Divider
7
8
PLL
VCO
Write
Write
0x06
0x07
D24
VCO[4]
CPS
VCO[3]
ICP
VCO[2]
X
VCO[1]
X
VCO[0]
X
VAS
X
ADL
X
ADE
9
10
LPF
Control
Write
Write
0x08
0x09
LPF[7]
STBY
LPF[6]
X
LPF[5]
PWDN
0
LPF[4]
X
LPF[3]
BBG[3]
LPF[2] LPF[1] LPF[0]
BBG[2] BBG[1] BBG[0]
11
Shutdown
Write
0x0A
X
PLL
0
DIV
0
VCO
0
BB
0
RFMIX RFVGA
0 0
FE
0
12
Test
Write
0x0B
CPTST[2]
0
CPTST[1]
0
CPTST[0]
0
X
TURBO
1
LD LD LD
MUX[2] MUX[1] MUX[0]
0 0 0
13
Status
Byte-1
Read
0x0C
POR
VASA
VASE
LD
X
X
X
X
14
Status
Byte-2
Read
0x0D
VCOSBR[4] VCOSBR[3] VCOSBR[2] VCOSBR[1] VCOSBR[0] ADC[2] ADC[1] ADC[0]
X = Don’t care.
Maxim Integrated
0 = Set to 0 for factory-tested operation.
1 = Set to 1 for factory-tested operation.
9
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