参数资料
型号: MAX31782ETL+T
厂商: Maxim Integrated Products
文件页数: 9/20页
文件大小: 0K
描述: IC MICROCONTROLLER 40TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 3,000
系列: MAXQ®
应用: 系统管理
核心处理器: MAXQ20
程序存储器类型: 闪存(64 kB),ROM(8 kB)
RAM 容量: 1K x 16
接口: I²C,SM 总线
输入/输出数: 5
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 40-TQFN-EP(6x6)
其它名称: 90-31782+TTR
MAX31782
System Management Microcontroller
17
The ADC can be set up to continuously poll the input
channels (continuous-sequence mode) or run a short
burst of conversions and enter a shutdown mode to con-
serve power (single-sequence mode).
The six external channels can be individually configured
to operate in external temperature mode. In external tem-
perature mode, current is forced into an external diode
that is connected between user-specified channel pins.
The diode temperature is obtained by measuring the
diode voltages at multiple bias currents. The device fea-
tures a 3-point series resistance-cancellation algorithm
to provide high-temperature measurement accuracy.
The ADC is able to measure the external diode tempera-
ture immune to the loop resistance. For both external
and internal temperature measurements, the internal ref-
erence is automatically selected and the full-scale (FS)
value is fixed at 1.225V. The temperature measurement
resolution is 0.125NC.
When the external channels are configured to operate in
voltage mode, the voltage applied on the correspond-
ing channel (differential or single-ended) is converted
to a digital readout. In voltage mode, the reference can
be either internal or external. If the internal reference is
used, the FS can be set to 1.225V or 5.5V. These FS
values can be trimmed by modifying the associated reg-
isters (ADCG1 and ADCG5), respectively.
In voltage mode, an ADC conversion takes 34 ADCCLK
cycles to complete. The ADCCLK is derived from the
system clock with division ratio defined by the ADC
Control register. The fastest ADC sampling rate is
SYSCLK/544. With a 4MHz system clock, this is theo-
retically equivalent to 7.35ksps. In applications where
extending the acquisition time is desired, the sample can
be acquired over a prolonged period determined by the
ADC Control register.
The ADC has eight configuration registers. Each channel
can have its own configuration, such as differential mode
select, data alignment select, acquisition extension
enable, ADC reference select, and external temperature
mode select, etc. The ADC also has sixteen 13-bit circu-
lar data buffers for conversion result storage. The ADC
data available interrupt flag (ADDAI) can be configured
to trigger an interrupt following a predetermined number
of samples. Once set, ADDAI can be cleared by soft-
ware or at the start of a conversion process.
When the device is put into stop mode, any in-progress
ADC conversion is aborted and the ADC start conver-
sion bit (ADCONV) is reset to 0. The ADC is shut down
completely to conserve power. On exiting stop mode,
the ADC waits on ADCONV = 1. When ADCONV is set
to 1, it counts 20 ADCCLK cycles before acquisition
commences.
Figure 5. ADC Block Diagram
MUX
AD0P
SCALER FOR
TEMPERATURE
SENSING CHANNELS
AD0N
AD5P
AD5N
INTERNAL
CHANNEL
12-BIT ADC CORE
ADC DATA
VOLTAGE
OFFSET
TEMPERATURE
OFFSET
ADCG1
ADCG5
INTERNAL
REFERENCE
EXTERNAL
REFERENCE
MAX31782
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