参数资料
型号: MAX4019ESD+T
厂商: Maxim Integrated Products
文件页数: 11/12页
文件大小: 0K
描述: IC BUFFER R-R 14SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
放大器类型: 缓冲器
电路数: 3
输出类型: 满摆幅
转换速率: 600 V/µs
-3db带宽: 200MHz
电流 - 输入偏压: 5.4µA
电压 - 输入偏移: 4000µV
电流 - 电源: 5.5mA
电流 - 输出 / 通道: 120mA
电压 - 电源,单路/双路(±): 3.15 V ~ 11 V,±1.575 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
供应商设备封装: 14-SOIC
包装: 带卷 (TR)
MAX4014/MAX4017/MAX4019/MAX4022
Low-Cost, High-Speed, Single-Supply, Gain of +2
Buffers with Rail-to-Rail Outputs in SOT23
8
_______________________________________________________________________________________
_______________Detailed Description
The MAX4014/MAX4017/MAX4019/MAX4022 are sin-
gle-supply, rail-to-rail output, voltage-feedback, closed-
loop buffers that employ current-feedback techniques
to achieve 600V/s slew rates and 200MHz band-
widths. These buffers use internal 500
resistors to
provide a preset closed-loop gain of +2V/V in the non-
inverting configuration or -1V/V in the inverting configu-
ration. Excellent harmonic distortion and differential
gain/phase performance make these buffers an ideal
choice for a wide variety of video and RF signal-pro-
cessing applications.
Local feedback around the buffer’ s output stage
ensures low output impedance, which reduces gain
sensitivity to load variations. This feedback also pro-
duces demand-driven current bias to the output tran-
sistors for ±120mA drive capability, while constraining
total supply current to less than 7mA.
__________Applications Information
Power Supplies
These devices operate from a single +3.15V to +11V
power supply or from dual supplies of ±1.575V to
±5.5V. For single-supply operation, bypass the VCC pin
to ground with a 0.1F capacitor as close to the pin as
possible. If operating with dual supplies, bypass each
supply with a 0.1F capacitor.
Selecting Gain Configuration
Each buffer in the MAX4014 family can be configured
for a voltage gain of +2V/V or -1V/V. For a gain of
+2V/V, ground the inverting terminal. Use the noninvert-
ing terminal as the signal input of the buffer (Figure 1a).
Grounding the noninverting terminal and using the
inverting terminal as the signal input configures the
buffer for a gain of -1V/V (Figure 1b).
Since the inverting input exhibits a 500
input imped-
ance, terminate the input with a 56
resistor when the
device is configured for an inverting gain in 50
appli-
cations (terminate with 88
in 75 applications).
Terminate the input with a 49.9
resistor in the nonin-
verting case. Output terminating resistors should direct-
ly match cable impedances in either configuration.
Layout Techniques
Maxim recommends using microstrip and stripline tech-
niques to obtain full bandwidth. To ensure that the PC
board does not degrade the buffer’s performance, design
it for a frequency greater than 1GHz. Pay careful attention
to inputs and outputs to avoid large parasitic capaci-
tance. Whether or not you use a constant-impedance
board, observe the following guidelines when designing
the board:
Don’t use wire-wrapped boards. They are too inductive.
Don’t use IC sockets. They increase parasitic capac-
itance and inductance.
Use surface-mount instead of through-hole compon-
ents for better high-frequency performance.
Use a PC board with at least two layers; it should be
as free from voids as possible.
Keep signal lines as short and as straight as possi-
ble. Do not make 90° turns; round all corners.
MAX40_ _
500
500
IN-
OUT
*R
OUT
IN
RTIN
IN+
*RL = 2R
MAX40_ _
500
500
OUT
*R
OUT
RS
RTIN
IN+
IN-
IN
*RL = 2R
Figure 1a. Noninverting Gain Configuration (AV = +2V/V)
Figure 1b. Inverting Gain Configuration (AV = -1V/V)
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MAX4019EEE+T IC BUFFER R-R 16QSOP
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