参数资料
型号: MAX4940BETN+T
厂商: Maxim Integrated Products
文件页数: 10/18页
文件大小: 0K
描述: IC DGTL PULSER HI-VOLT 56TQFN
标准包装: 2,500
应用: 医疗用超声波成像,声纳
电源电压: 2.37 V ~ 6 V
工作温度: 0°C ~ 70°C
安装类型: *
封装/外壳: *
供应商设备封装: *
包装: *
Dual/Quad, Unipolar/Bipolar,
High-Voltage Digital Pulsers
Detailed Description
The MAX4940/MAX4940A are quad high-voltage, high-
speed pulsers that can be independently configured
for either unipolar/bipolar/multilevel pulse outputs (see
Figures 5 and 6.). These devices have independent
logic inputs for full pulse control and independent active
clamps. The clamp input, CLP_, can be set high to
activate the clamp automatically when the device is not
pulsing to the positive or negative high-voltage supplies.
Logic Inputs (INP_, INN_, CLP_, EN)
INP_ controls the on and off states of the high-side FET,
INN_ controls the on and off states of the low-side FET,
and CLP_ controls the active clamp. A global enable
input (EN) can be used to enable/disable all channels.
These signals give complete control of the output stage
of each driver (see the Truth Tables section for all logic
combinations). The MAX4940/MAX4940A logic inputs
are CMOS logic compatible and the logic levels are ref-
erenced to V DD for maximum flexibility. The low 5pF (typ)
input capacitance of the logic inputs reduce loading and
increase switching speed.
Truth Tables
MAX4940
EN
INPUTS
INP_ INN_
CLP_
OUTPUTS
OUT_
STATE
0
1
1
1
1
1
X
0
0
0
1
1
X
0
0
1
0
1
X
0
1
X
X
X
High impedance
High impedance
GND
V NN_
V PP_
Not allowed
Powered up, INP_/INN_ disabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Not allowed.
MAX4940A
INPUTS
OUTPUTS
EN
0
1
1
1
1
1
INP1A
INP1B
X
0
0
0
1
1
INN1A
INN1B
X
0
0
1
0
1
CLP1A
CLP1B
X
0
1
0
0
1
OUT1A
OUT1B
High impedance
High impedance
GND
V NN_
V PP_
Not allowed
STATE
Powered up, INP_/INN_ disabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Not allowed.
INPUTS
OUTPUTS
EN
0
1
1
1
1
1
INP2A
INP2B
X
0
0
0
1
1
INN2A
INN2B
X
0
0
1
0
1
CLP2A
CLP2B
X
0
1
X
X
X
OUT2A
OUT2B
High impedance
High impedance
GND
V NN_
V PP_
Not allowed
STATE
Powered up, INP_/INN_ disabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Powered up, all inputs enabled.
Not allowed.
X = Don’t care.
0 = Logic-low.
1 = Logic-high.
10
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