参数资料
型号: MAX5418LETA+T
厂商: Maxim Integrated Products
文件页数: 13/14页
文件大小: 0K
描述: IC POT DGTL 256-TAP I2C 8-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
接片: 256
电阻(欧姆): 100k
电路数: 1
温度系数: 标准值 35 ppm/°C
存储器类型: 非易失
接口: I²C(设备位址)
电源电压: 2.7 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-TDFN-EP(3x3)
包装: 标准包装
产品目录页面: 1399 (CN2011-ZH PDF)
其它名称: MAX5418LETA+TDKR
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
8
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1VDD
Power-Supply Input. 2.7V to 5.25V voltage range. Bypass with a 0.1F capacitor from VDD to GND.
2
SCL
I
2C-Interface Clock Input
3
SDA
I
2C-Interface Data Input
4A0
Address Input. Sets the A0 bit in the device ID address.
5
GND
Ground
6
L
Low Terminal
7
W
Wiper Terminal
8
H
High Terminal
—EP
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not intended as an electrical point.
tHD-STA
tSU-DAT
tHIGH
tR
tF
tHD-DAT
tHD-STA
S
Sr
A
tSU-STA
tLOW
tBUF
tSU-STO
PS
tR
tF
SCL
SDA
PARAMETERS ARE MEASURED FROM 30% TO 70%.
Detailed Description
The MAX5417/MAX5418/MAX5419 contain a resistor
array with 255 resistive elements. The MAX5417 has a
total end-to-end resistance of 50k
, the MAX5418 has
an end-to-end resistance of 100k
, and the MAX5419
has an end-to-end resistance of 200k
. The
MAX5417/MAX5418/MAX5419 allow access to the high,
low, and wiper terminals for a standard voltage-divider
configuration. H, L, and W can be connected in any
desired configuration as long as their voltages fall
between GND and VDD.
A simple 2-wire I2C-compatible serial interface moves
the wiper among the 256 tap points. A nonvolatile mem-
ory stores the wiper position and recalls the stored wiper
position in the nonvolatile memory upon power-up. The
nonvolatile memory is guaranteed for 50 years for wiper
data retention and up to 200,000 wiper store cycles.
Figure 1. I2C Serial-Interface Timing Diagram
VDD
IOL = 3mA
IOH = 0mA
VOUT
400pF
SDA
Figure 2. Load Circuit
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