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参数资料
| 型号： | MAX5858ECM+TD |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 20/23页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT DUAL 300MSPS 48TQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 设置时间： | 11ns |
| 位数： | 10 |
| 数据接口： | 并联 |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 816mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TQFP 裸露焊盘 |
| 供应商设备封装： | 48-TQFP 裸露焊盘（7x7） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 2 电流，单极 |
| 采样率（每秒）： | 300M |
MAX5858
Dual, 10-Bit, 300Msps, Current-Output DAC with
4x/2x/1x Interpolation Filters
6
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = CVDD = 3V, AGND = DGND = CGND = 0, fDAC = 165Msps, no interpolation, external reference, VREF = 1.2V,
IFS = 20mA, output amplitude = 0dB FS, differential output, TA = TMIN to TMAX, unless otherwise noted. TA > +25°C guaranteed by
production test. TA < +25°C guaranteed by design and characterization. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
No interpolation
34
2x interpolation
75
fDAC = 60Msps
4x interpolation
72
No interpolation
54
61
2x interpolation
146
fDAC = 165Msps
4x interpolation
140
2x interpolation
172
186
Digital Supply Current (Note 4)
IDVDD
fDAC = 200Msps
4x interpolation
165
178
mA
Clock Power-Supply Voltage
CVDD
2.7
3.3
V
fDAC = 60Msps
25
fDAC = 165Msps
69
80
Clock Supply Current (Note 4)
ICVDD
fDAC = 200Msps, 2x interpolation or 4x
interpolation
80
94
mA
Standby Current
ISTANDBY
(Note 5)
4.4
4.8
mA
Power-Down Current
IPD
(Note 5)
1
A
No interpolation
312
2x interpolation
435
fDAC = 60Msps
4x interpolation
426
No interpolation
504
570
2x interpolation
780
fDAC = 165Msps
4x interpolation
762
2x interpolation
891
Total Power Dissipation
PTOT
fDAC = 200Msps
4x interpolation
870
mW
Note 1: Including the internal reference voltage tolerance.
Note 2: Measured single ended with 50
load and complementary output connected to ground.
Note 3: Guaranteed by design, not production tested.
Note 4: fOUT = 5MHz.
Note 5: All digital inputs at 0 or DVDD. Clock signal disabled.
TO OUTPUT
PIN
5pF
0.5mA
1.6V
Figure 1. Load Test Circuit for CLK Outputs
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