参数资料
型号: MAX5858ECM+TD
厂商: Maxim Integrated Products
文件页数: 5/23页
文件大小: 0K
描述: IC DAC 10BIT DUAL 300MSPS 48TQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
设置时间: 11ns
位数: 10
数据接口: 并联
转换器数目: 2
电压电源: 单电源
功率耗散(最大): 816mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-TQFP 裸露焊盘
供应商设备封装: 48-TQFP 裸露焊盘(7x7)
包装: 带卷 (TR)
输出数目和类型: 2 电流,单极
采样率(每秒): 300M
MAX5858
Dual, 10-Bit, 300Msps, Current-Output DAC with
4x/2x/1x Interpolation Filters
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13
Detailed Description
The MAX5858 dual, high-speed, 10-bit, current-output
DAC provides superior performance in communication
systems requiring low-distortion analog-signal recon-
struction. The MAX5858 combines two DACs with 2x/4x
programmable digital interpolation filters, divide-by-N
clock output, and an on-chip 1.24V reference. The cur-
rent outputs of the DACs can be configured for differen-
tial or single-ended operation. The full-scale output
current range is adjustable from 2mA to 20mA to opti-
mize power dissipation and gain control.
The MAX5858 accepts an input data rate to 165MHz or
a DAC conversion rate of 300MHz. The inputs are
latched on the rising edge of the clock whereas the out-
put latches on the following rising edge.
The two-stage digital interpolation filters are program-
mable to 4x, 2x, or no interpolation. When operating in
4x interpolation mode, the interpolator increases the
DAC conversion by a factor of four, providing a four-
fold increase in separation between the reconstructed
waveform spectrum and its first image.
The MAX5858 features three modes of operation: normal,
standby, and power-down. These modes allow efficient
power management. In power-down, the MAX5858 con-
sumes only 1A of supply current. Wake-up time from
standby mode to normal DAC operation is 0.7s.
Programming the DAC
An 8-bit control word routed through channel A’s data
port programs the gain matching, interpolator configu-
ration, and operational mode of the MAX5858. The con-
trol word is latched on the falling edge of CW. Table 1
represents the control word format and function.
The gain on channel A can be adjusted to achieve gain
matching between two channels in a user’s system.
The gain on channel A can be adjusted from -0.4dB to
0.35dB in steps of 0.05dB by using bits G3 to G0 (see
Table 3).
2x DIGITAL
INTERPOLATION
FILTER
2x DIGITAL
INTERPOLATION
FILTER
INPUT
REGISTER
10-BIT
300MHz
DAC
10
DA9–DA0
OUTPA
OUTNA
2x DIGITAL
INTERPOLATION
FILTER
2x DIGITAL
INTERPOLATION
FILTER
INPUT
REGISTER
10-BIT
300MHz
DAC
10
DB9–DB0
OUTPB
OUTNB
CONTROL REGISTER
1.24V REFERENCE AND CONTROL AMPLIFIER
CLK
CLKXN
CLKXP
F2EN
F1EN
AGND
REFR
RSET
DGND
CGND
REFO
REN
CW
IDE
DVDD
CVDD
AVDD
MAX5858
Simplified Block Diagram
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