参数资料
型号: MAX5965AUAX+T
厂商: Maxim Integrated
文件页数: 27/54页
文件大小: 1334K
描述: IC PSE CTRLR FOR POE 36SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1,000
类型: 以太网供电控制器(PoE)
应用: IP 电话,LAN 网络供电,网络路由器和交换机
内部开关:
电源电压: 2.4 V ~ 3.6 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 36-BSOP(0.295",7.50mm 宽)
供应商设备封装: 36-SSOP
包装: 带卷 (TR)
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
______________________________________________________________________________________   27
Message Format for Reading
The MAX5965A/MAX5965B read using the MAX5965A/
MAX5965Bs internally stored command byte as an
address pointer, the same way the stored command
byte is used as an address pointer for a write. The point-
er autoincrements after reading each data byte using the
same rules as for a write. Thus, a read is initiated by first
configuring the MAX5965A/MAX5965Bs command byte
by performing a write. The master now reads n consec-
utive bytes from the MAX5965A/MAX5965B, with the first
data byte read from the register addressed by the initial-
ized command byte. When performing read-after-write
verification, remember to reset the command bytes
address because the stored control byte address autoin-
crements after the write.
Operation with Multiple Masters
When the MAX5965A/MAX5965B operate on a 2-wire
interface with multiple masters, a master reading the
MAX5965A/MAX5965B should use repeated starts
between the write which sets the MAX5965A/
MAX5965Bs address pointer, and the read(s) that take
the data from the location(s). It is possible for master 2 to
take over the bus after master 1 has set up the
MAX5965A/MAX5965Bs address pointer but before mas-
ter 1 has read the data. If master 2 subsequently resets
the MAX5965A/MAX5965Bs address pointer then master
1s read may be from an unexpected location.
Command Address Autoincrementing
Address autoincrementing allows the MAX5965A/
MAX5965B to be configured with fewer transmissions
by minimizing the number of times the command
address needs to be sent. The command address
stored in the MAX5965A/MAX5965B generally incre-
ments after each data byte is written or read (Table 5).
The MAX5965A/MAX5965B are designed to prevent
overwrites on unavailable register addresses and unin-
tentional wrap-around of addresses.
Figure 11. Control and Single Data Byte Received
S
A
A
A
P
0
SLAVE ADDRESS
CONTROL BYTE
DATA BYTE
ACKNOWLEDGE FROM THE MAX5965A/MAX5965B
1 BYTE
AUTOINCREMENT
MEMORY WORD ADDRESS
D15  D14  D13  D12  D11  D10   D9   D8
D1   D0
D3   D2
D5   D4
D7   D6
HOW CONTROL BYTE AND DATA BYTE MAP
INTO THE REGISTER
ACKNOWLEDGE FROM THE MAX5965A/MAX5965B
ACKNOWLEDGE FROM THE MAX5965A/MAX5965B
R/W
Figure 12. n Data Bytes Received
S
A
A
A
P
0
SLAVE ADDRESS
CONTROL BYTE
DATA BYTE
ACKNOWLEDGE FROM THE MAX5965A/MAX5965B
n BYTES
AUTOINCREMENT
MEMORY WORD ADDRESS
D15  D14  D13  D12  D11  D10   D9   D8
D1   D0
D3   D2
D5   D4
D7   D6
HOW CONTROL BYTE AND DATA BYTE MAP
INTO THE REGISTER
ACKNOWLEDGE FROM THE MAX5965A/MAX5965B
ACKNOWLEDGE FROM THE MAX5965A/MAX5965B
R/W
Table 5. Autoincrement Rules
COMMAND BYTE
ADDRESS RANGE
AUTOINCREMENT BEHAVIOR
0x00 to 0x26
Command address autoincrements
after byte read or written
0x26
Command address remains at 0x26
after byte written or read
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