MAX5980EVKIT# (Maxim) PDF资料下载 Datasheet(29/49 页)

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参数资料

型号：	MAX5980EVKIT#
厂商：	Maxim Integrated Products
文件页数：	29/49页
文件大小：	0K
描述：	EVAL KIT MAX5980
标准包装：	1
系列：	*

Quad, IEEE 802.3at/af PSE Controller

for Power-over-Ethernet

Table 5. Register Map Summary (continued)

ADDR

REGISTER

NAME

TYPE

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

RESET

STATE

Developer

43h

ID/Revision

R/W

DEV_ID[2]

DEV_ID[1]

DEV_ID[0]

—

—

DEV_REV[2] DEV_REV[1] DEV_REV[0]

0000–0000

Number

44h

45h

46h

47h

48h

49h

4Ah

4Bh

4Ch

4Dh

4Eh

4Fh

50h

51h

52h

53h

54h

55h

56h

57h

58h

59h

5Ah

5Bh

5Ch

5Dh

5Eh

5Fh

High-Power

Enable

Reserved

Port 1 GPMD

Port 1 ICUT

Port 1 ILIM

Port 1 High-

Power Status

Reserved

Port 2 GPMD

Port 2 ICUT

Port 2 ILIM

Port 2 High-

Power Status

Reserved

Port 3 GPMD

Port 3 ICUT

Port 3 ILIM

Port 3 High-

Power Status

Reserved

Port 4 GPMD

Port 4 ICUT

Port 4 ILIM

Port 4 High-

Power Status

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

R/W

—-

R/W

R/W

R/W

R

—

R/W

R/W

R/W

R

—

R/W

R/W

R/W

R

—

R/W

R/W

R/W

R

—

—

—

—

—

—

—

—

—

—

RDIS1

1

—

—

—

RDIS2

1

—

—

—

RDIS3

1

—

—

—

RDIS4

1

—

—

—

—

—

—

—

—

—

—

—

CUT_RNG1

ILIM1

—

—

—

CUT_RNG2

ILIM2

—

—

—

CUT_RNG3

ILIM3

—

—

—

CUT_RNG4

ILIM4

—

—

—

—

—

—

—

—

—

—

—

ICUT1[5]

0

—

—

—

ICUT2[5]

0

—

—

—

ICUT3[5]

0

—

—

—

ICUT4[5]

0

—

—

—

—

—

—

—

—

—

—

—

ICUT1[4]

0

—

—

—

ICUT2[4]

0

—

—

—

ICUT3[4]

0

—

—

—

ICUT4[4]

0

—

—

—

—

—

—

—

—

HP_EN4

—

—

ICUT1[3]

0

—

—

—

ICUT2[3]

0

—

—

—

ICUT3[3]

0

—

—

—

ICUT4[3]

0

—

—

—

—

—

—

—

—

HP_EN3

—

—

ICUT1[2]

0

—

—

—

ICUT2[2]

0

—

—

—

ICUT3[2]

0

—

—

—

ICUT4[2]

0

—

—

—

—

—

—

—

—

HP_EN2

—

LEG_EN1

ICUT1[1]

0

FET_BAD1

—

LEG_EN2

ICUT2[1]

0

FET_BAD2

—

LEG_EN3

ICUT3[1]

0

FET_BAD3

—

LEG_EN4

ICUT4[1]

0

FET_BAD4

—

—

—

—

—

—

—

HP_EN1

—

PONG_EN1

ICUT1[0]

0

PONG_PD1

—

PONG_EN2

ICUT2[0]

0

PONG_PD2

—

PONG_EN3

ICUT3[0]

0

PONG_PD3

—

PONG_EN4

ICUT4[0]

0

PONG_PD4

—

—

—

—

—

—

—

0000–XXXX

—

0000–000X

XX01–0100

1000–0000

0000–0000

—

0000–000X

XX01–0100

1000–0000

0000–0000

—

0000–000X

XX01–0100

1000–0000

0000–0000

—

0000–000X

XX01–0100

1000–0000

0000–0000

—

—

—

—

—

—

—

X

Indicates that the register reset state depends on either the status of the external programming pins (A3–A0, EN_CL5, AUTO,

and MIDSPAN) or that the cause of the reset condition determines the state.

— Indicates that the register is either unused or reserved. Always write a logic-low to any reserved bits when programming a reg-

ister, unless otherwise indicated in the Register Map and Description section.

29

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