参数资料
| 型号： | MAX5980EVKIT# |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 46/49页 |
| 文件大小： | 0K |
| 描述： | EVAL KIT MAX5980 |
| 标准包装： | 1 |
| 系列： | * |
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Quad, IEEE 802.3at/af PSE Controller
for Power-over-Ethernet
Port Current-Limit Register
(R48h, R4Dh, R52h, and R57h)
The Port Current-Limit registers (Table 41) are used to set
the current-limit SENSE_ voltage threshold for the corre-
sponding port. On a power-up or after a reset condition,
these registers are set to a default value of 80h. Bit 7 is
hardwired to 1, while bits 5 to 0 are hardwired to 0. ILIM_
(bit 6) is set to 0 for a Class 0–3 PD, and to 1 for a Class
4 or 5 PD. The state of ILIM and the classification result
(in the case of Class 5) determine the current limit (see
the Electrical Characteristics table, V SU_LIM for details).
Table 40. Port Overcurrent Register
ADDRESS = 47h, 4Ch, 51h, 56h
SYMBOL BIT NO. TYPE
Port High-Power Status Register
(R49h, R4Eh, R53h, and R58h)
The Port High-Power Status registers (Table 42) are
used to external FET failures and successful 2-event
classification results. On a power-up or after a reset
condition, these registers are set to a default value of
00h. FET_BAD_ is set to 1 if the port is powered, there
is no current-limit condition, and V OUT_ - V EE > 2V.
PONG_PD_ is set to 1 every time a successful 2-event
classification occurs on the corresponding port.
DESCRIPTION
RDIS_
CUT_RNG_
ICUT_[5:0]
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Sets the current-sense scale on the corresponding port; always set to 1
ICUT is doubled when set to 0
Sets the overcurrent SENSE_ voltage threshold (V CUT ) for the corresponding port
Table 41. Port Current-Limit Register
ADDRESS = 48h, 4Dh, 52h, 57h
SYMBOL BIT NO. TYPE
DESCRIPTION
1
ILIM_
0
0
0
0
0
0
7
6
5
4
3
2
1
0
—
R/W
—
—
—
—
—
—
Hardwired to 1
Current-limit setting for the corresponding port
Hardwired to 0
Table 42. Por t High-Power Status Register
ADDRESS = 49h, 4Eh, 53h, 58h
SYMBOL BIT NO. TYPE
DESCRIPTION
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
FET_BAD_
PONG_PD_
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Set to 1 if a FET failure is detected on the corresponding port
Set to 1 when a 2-event classification has occurred
46
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