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| 型号： | MAX669EUB/V+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/18页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR PWM HYBRID 10-UMAX |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式，混合 |
| 输出数： | 1 |
| 频率 - 最大： | 575kHz |
| 占空比： | 94% |
| 电源电压： | 1.8 V ~ 28 V |
| 降压： | 无 |
| 升压： | 是 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 带卷 (TR) |
MAX668/MAX669
1.8V to 28V Input, PWM Step-Up
Controllers in μMAX
SYNC/ SHDN and FREQ Inputs
The SYNC/ SHDN pin provides both external-clock syn-
chronization (if desired) and shutdown control. When
SYNC/ SHDN is low, all IC functions are shut down. A
logic high at SYNC/ SHDN selects operation at a fre-
quency set by R OSC , connected from FREQ to GND.
The relationship between f OSC and R OSC is:
R OSC = 5 x 10 10 / f OSC
So a 500kHz operating frequency, for example, is set
with R OSC = 100k ? .
Rising clock edges on SYNC/ SHDN are interpreted as
synchronization inputs. If the sync signal is lost while
SYNC/ SHDN is high, the internal oscillator takes over at
the end of the last cycle and the frequency is returned
to the rate set by R OSC . If sync is lost with SYNC/ SHDN
low, the IC waits for 70μs before shutting down. This
maintains output regulation even with intermittent sync
signals. When an external sync signal is used, Idle
Mode switchover at the 15mV current-sense threshold
is disabled so that Idle Mode only occurs at very light
loads. Also, R OSC should be set for a frequency 15%
below the SYNC clock rate:
R OSC(SYNC) = 5 x 10 10 / (0.85 x f SYNC )
Soft-Start
The MAX668/MAX669 feature a “digital” soft start which
is preset and requires no external capacitor. Upon
start-up, the peak inductor increments from 1/5 of the
value set by R CS , to the full current-limit value, in five
steps over 1024 cycles of f OSC or f SYNC . For example,
with an f OSC of 200kHz, the complete soft-start
sequence takes 5ms. See the Typical Operating
Characteristics for a photo of soft-start operation. Soft-
start is implemented: 1) when power is first applied to
the IC, 2) when exiting shutdown with power already
applied, and 3) when exiting undervoltage lockout. The
MAX669’s soft-start sequence does not start until LDO
reaches 2.5V.
Design Procedure
The MAX668/MAX669 can operate in a number of DC-
DC converter configurations including step-up, SEPIC
(single-ended primary inductance converter), and fly-
back. The following design discussions are limited to
step-up, although SEPIC and flyback examples are
shown in the Application Circuits section.
Setting the Operating Frequency
The MAX668/MAX669 can be set to operate from
100kHz to 500kHz. Choice of operating frequency will
depend on number of factors:
Maxim Integrated
1) Noise considerations may dictate setting (or syn-
chronizing) f OSC above or below a certain frequency
or band of frequencies, particularly in RF applica-
tions.
2) Higher frequencies allow the use of smaller value
(hence smaller size) inductors and capacitors.
3) Higher frequencies consume more operating power
both to operate the IC and to charge and discharge
the gate of the external FET. This tends to reduce
efficiency at light loads; however, the MAX668/
MAX669’s Idle Mode feature substantially increases
light-load efficiency.
4) Higher frequencies may exhibit poorer overall effi-
ciency due to more transition losses in the FET;
however, this shortcoming can often be nullified by
trading some of the inductor and capacitor size
benefits for lower-resistance components.
The oscillator frequency is set by a resistor, R OSC , con-
nected from FREQ to GND. R OSC must be connected
whether or not the part is externally synchronized R OSC
is in each case:
R OSC = 5 x 10 10 / f OSC
when not using an external clock.
R OSC(SYNC) = 5 x 10 10 / (0.85 x f SYNC )
when using an external clock, f SYNC .
Setting the Output Voltage
The output voltage is set by two external resistors (R2
and R3, Figures 2, 3, 4, and 5). First select a value for
R3 in the 10k ? to 1M ? range. R2 is then given by:
R2 = R3 [(V OUT / V REF ) – 1]
where V REF is 1.25V.
Determining Inductance Value
For most MAX668/MAX669 boost designs, the inductor
value (L IDEAL ) can be derived from the following equa-
tion, which picks the optimum value for stability based
on the MAX668/MAX669’s internally set slope compen-
sation:
L IDEAL = V OUT / (4 x I OUT x f OSC )
The MAX668/MAX669 allow significant latitude in induc-
tor selection if L IDEAL is not a convenient value. This
may happen if L IDEAL is a not a standard inductance
(such as 10μH, 22μH, etc.), or if L IDEAL is too large to
be obtained with suitable resistance and saturation-cur-
rent rating in the desired size. Inductance values small-
er than L IDEAL may be used with no adverse stability
effects; however, the peak-to-peak inductor current
(I LPP ) will rise as L is reduced. This has the effect of
raising the required I LPK for a given output power and
also requiring larger output capacitance to maintain a
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