参数资料
型号: MAX6898PALT+T
厂商: Maxim Integrated Products
文件页数: 2/15页
文件大小: 0K
描述: IC SEQUENCE/SUPERVISOR 6UDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
类型: 序列发生器
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 可调节/可选择
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 6-WFDFN
供应商设备封装: 6-uDFN(1.5x1.0)
包装: 标准包装
其它名称: MAX6898PALT+TDKR
MAX6895–MAX6899
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
ABSOLUTE MAXIMUM RATINGS
V CC , ENABLE, ENABLE , IN......................................-0.3V to +6V
OUT, OUT (push-pull) ................................-0.3V to (V CC + 0.3V)
OUT, OUT (open-drain)..........................................-0.3V to +30V
CDELAY......................................................-0.3V to (V CC + 0.3V)
Output Current (all pins) ...................................................±20mA
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Continuous Power Dissipation (T A = +70°C)
6-Pin μDFN (derate 2.1mW/°C above +70°C)...........167.7mW
6-Pin Thin SOT23 (derate 9.1mW/°C above +70°C) ...727.3mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
μDFN
Junction-to-Ambient Thermal Resistance ( θ JA )...............477°C/W
Junction-to-Case Thermal Resistance ( θ JC )......................122°C/W
Thin SOT23
Junction-to-Ambient Thermal Resistance ( θ JA )................110°C/W
Junction-to-Case Thermal Resistance ( θ JC ).......................50°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four layer
board. For detailed information on package thermal considerations refer to www.maximintegrated.com/thermal-tutorial .
ELECTRICAL CHARACTERISTICS
(V CC = 1.5V to 5.5V, T A = -40°C to +125°C, unless otherwise specified. Typical values are at V CC = 3.3V and T A = +25°C, unless
otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY
Operating Voltage Range
V CC
1.5
5.5
V
Undervoltage Lockout (Note 3)
V CC Supply Current
UVLO
I CC
V CC falling
V CC = 3.3V, no load
1.20
10
1.35
20
V
μA
IN
Threshold Voltage
Hysteresis
Input Current (Note 4)
V TH
V HYST
I IN
V IN rising, 1.5V < V CC < 5.5V
V IN falling
V IN = 0V or V CC
0.491
-15
0.5
5
0.509
+15
V
mV
nA
CDELAY
Delay Charge Current
I CD
200
250
300
nA
Delay Threshold
CDELAY Pulldown Resistance
V TCD
R CDELAY
CDELAY rising
0.95
1.00
130
1.05
500
V
Ω
ENABLE/ ENABLE
Input Low Voltage
Input High Voltage
V IL
V IH
1.4
0.4
V
V
Input Leakage Current
I LEAK
ENABLE, ENABLE = V CC or GND
-100
+100
nA
2
Maxim Integrated
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