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参数资料
| 型号： | MAX7369EUP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/19页 |
| 文件大小： | 0K |
| 描述： | IC MULTIPLEXER DUAL 4X1 20TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 功能： | 多路复用器 |
| 电路： | 2 x 4:1 |
| 电压电源： | 单电源 |
| 电压 - 电源，单路/双路(±)： | 2.3 V ~ 5.5 V |
| 电流 - 电源： | 6µA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 带卷 (TR) |
MAX7367/MAX7368/MAX7369
4-Channel I2C Switches/Multiplexer
12
______________________________________________________________________________________
Detailed Description
The MAX7367/MAX7368/MAX7369 bidirectional, four-
channel I2C switches/multiplexer expand the main I2C
bus up to four extended buses. The MAX7369 is a 1:4
multiplexer that connects the main I2C bus to one chan-
nel at a time. The MAX7367/MAX7368 are four-channel
switches that can connect the main I2C bus to one or
more channels at a time. These devices isolate bus
loading by separating available I2C devices into groups
on the channels. The total loading capacitance of the
main bus plus those of the connected channel must not
exceed 400pF. The extended buses are connected or
disconnected through the main I2C bus by writing to the
control register of the MAX7367/MAX7368/MAX7369.
Any device connected to an I2C bus can transmit and
receive signals. The MAX7367/MAX7368/MAX7369 are
transparent to signals sent and received at each channel,
allowing multiple masters on the buses. These devices
are compatible with the I2C protocol of clock stretch, syn-
chronization, and arbitration in case of multiple masters
addressing
the
bus
at
the
same
time.
The
MAX7367/MAX7368 have a
RESET input that allows
external circuitry to set the MAX7367/MAX7368 to its
default state anytime after the device has powered up.
The MAX7367/MAX7369 have interrupt inputs, allowing
devices on the extended bus to send an interrupt signal
to the master on the main bus.
Device Address
The MAX7367/MAX7368/MAX7369 have selectable
device addresses through external inputs. The
MAX7367 slave address consists of 5 fixed bits
(A6–A2, set to 11100), followed by 2 pin-programmable
bits (A1 and A0), as shown in Figure 4. The MAX7368/
MAX7369 slave address consists of 4 fixed bits
(A6–A3, set to 1110), followed by 3 pin-programmable
bits (A2, A1 and A0), as shown in Figure 5. The most
significant address bit (A6) is transmitted first, followed
by the remaining bits. The addresses A2 (for MAX7368/
MAX7369), A1, and A0 can also be driven dynamically
if required, but the values must be stable when they are
expected in the address sequence.
Control/Interrupt Register
There is a control/interrupt register inside the MAX7367/
MAX7369 (Figures 6 and 8). There is a control (only)
register inside the MAX7368 (Figure 7). Use the main
I2C bus to write or read from this register. Following the
successful acknowledgement of the slave address, the
master bus sends a byte or the master bus receives a
byte from/to the MAX7367/MAX7368/MAX7369. The last
3 bits (for the MAX7369) or 4 bits (for the MAX7367/
MAX7368) of the byte are stored in the control/interrupt
register (B0 to B2 or B0 to B3) for channel selection. If
multiple bytes are received, only the last byte received
is saved. The first four bits of the register represent the
interrupt condition (for the MAX7367/MAX7369 only).
1
0
A1
A0
R/W
FIXED
HARDWARE SELECTION
Figure 4. MAX7367 Slave Address
1
0
A2
A1
A0
R/W
FIXED
HARDWARE SELECTION
Figure 5. MAX7368/MAX7369 Slave Address
7
INT3
INT2
INT1
INT0
B3
B2
B1
B0
65
4
32
1
0
CHANNEL 0
INT0
INT1
INT2
INT3
CHANNEL SELECTION BITS
(READ/WRITE)
INTERRUPT BITS
(READ ONLY)
CHANNEL 1
CHANNEL 2
CHANNEL 3
Figure 6. MAX7367 Control/Interrupt Register
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