参数资料
型号: MAX7456EUI+
厂商: Maxim Integrated Products
文件页数: 18/44页
文件大小: 0K
描述: IC ON-SCREEN DISPLAY 28-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
类型: OSD(屏幕显示)视频发生器
应用: 安全系统,视频路由
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 管件
产品目录页面: 1424 (CN2011-ZH PDF)
Video Mode 0 Register (VM0)
Write address = 00H, read address = 80H.
Read/write access: unrestricted.
To write to this register, the following conditions must
be met:
1) STAT[5] = 0, the character memory (NVM) is not
busy.
2) DMM[2] = 0, the display memory (SRAM) is not
in the process of being cleared.
Single-Channel Monochrome On-Screen
Display with Integrated EEPROM
BIT
DEFAULT
FUNCTION
7
0
Don’t Care
60
Video Standard Select
0 = NTSC
1 = PAL
5, 4
00
Sync Select Mode (Table 1)
0x = Autosync select (external sync when LOS = 0 and internal sync when LOS = 1)
10 = External
11 = Internal
30
Enable Display of OSD Image
0 = Off
1 = On
20
Vertical Synchronization of On-Screen Data
0 = Enable on-screen display immediately
1 = Enable on-screen display at the next VSYNC
10
Software Reset Bit
When this bit is set, all registers are set to their default values and the display memory is cleared.
When a stable 27MHz clock is present, this bit is automatically cleared internally after typically
100s. The user does not need to write a 0 afterwards. SPI operations should not be performed
during this time or unpredictable results may occur. The status of the bit can be checked by
reading this register after typically 100s. This register is not accessible for writing until the display
memory clear operation is finished (typically 20s).
00
Video Buffer Enable
0 = Enable
1 = Disable (VOUT is high impedance)
X = Don’t care.
MAX7456
Maxim Integrated
25
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