参数资料
型号: MAX8513EEI+T
厂商: Maxim Integrated
文件页数: 19/35页
文件大小: 0K
描述: IC REG TRPL BUCK/LINEAR 28QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
拓扑: 降压(降压)(1),线性(LDO)(2)
功能: 任何功能
输出数: 3
频率 - 开关: 250kHz ~ 1.5MHz
电压/电流 - 输出 1: 控制器
电压/电流 - 输出 2: 控制器
电压/电流 - 输出 3: 控制器
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 4.5 V ~ 28 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
供应商设备封装: 28-QSOP
包装: 带卷 (TR)
Wide-Input, High-Frequency, Triple-Output Supplies
with Voltage Monitor and Power-On Reset
diode on the secondary side (Q2 and D2 in the Typical
Applications Circuits ). n 2 and n 1 are the number of
turns of the secondary winding and the primary wind-
dropping out of regulation. The value of the storage
capacitor, C S , can be calculated as:
C S = ? 0 . 5 × ? × ?
t WARN
( V PFI - V DROOP )
ing, respectively.
It is important to have the secondary winding tightly
coupled with the primary winding to minimize leakage
inductance for higher efficiency. The positive voltage
generated by the secondary winding can also be
×
? P OUT 1 ? ? 1
? η ? ? V PFI
-
1 ?
V DROOP ? ?
stacked with the main DC-DC step-down converter out-
put to further improve efficiency and reduce winding
cost. In this case, the secondary-side voltage is:
where P OUT1 is the total output power, η is the total
converter efficiency, V PFI is the input voltage value at
the input power-fail (PFI) trip threshold, and V DROOP is
) × ? ? nn 2 ? ?
V SEC = ( V OUT 1 + V Q 2
? ?
1
+ V OUT 1 - V D2
the input voltage value where V OUT1 starts dropping
out of regulation.
V PFI and V DROOP can be calculated as:
V PFI = 1 . 22 V × ? 1 +
R 11 ?
Input Capacitor
The input-filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
?
?
R 10 ?
?
ripple on the input caused by the AC-RMS current
through the ESR of the input capacitor (C2 in the Typical
Applications Circuits ). The input capacitor must meet
where R10 and R11 are the resistive-dividers from IN to
PFI to GND in the Typical Applications Circuits .
the ripple-current requirement (I IN_RMS ) imposed by the
switching currents defined by the following equation:
V DROOP =
V OUT1
D MAX
V OUT 1 × ( V IN OUT 1 )
I IN _ RMS =
I OUT 1 ×
V IN
- V
where D MAX is the maximum duty cycle.
To ensure for worst-case component tolerances such
I IN_RMS has a maximum value when the input voltage
equals twice the output voltage (V IN = 2 × V OUT1 ), so
I IN_RMS(MAX) = I OUT1 / 2. Ceramic capacitors are rec-
ommended due to their low ESR and ESL at high fre-
quency, with relatively low cost. Choose a capacitor that
exhibits less than 10 ° C temperature rise at the maximum
operating RMS current for optimum long-term reliability.
For applications that require input power-fail warning,
such as dying gasp, add a large-value electrolytic
capacitor (C S ) to the input as a local energy storage
device to provide the power to the converter in case of
input power-fail. The capacitor value must be high
enough to meet the desired power-fail warning time,
t WARN , where t WARN is the time from when PFI trips the
PFO output to when the main output (OUT1) starts
as capacitance of C S , converter efficiency, V PFI , and
V DROOP ’s threshold over the operating temperature
range, it is recommended to select C S at least 1.5 times
the calculated value above.
Output Capacitor
The key selection parameters for the output capacitor
are the actual capacitance value, the equivalent series
resistance (ESR), the equivalent series inductance
(ESL), and the voltage-rating requirements. All of these
affect the overall stability, output ripple voltage, and
transient response.
The output ripple is composed of three components: vari-
ations in the charge stored in the output capacitor, the
voltage drop across the capacitor’s equivalent series
resistance (ESR), and equivalent series inductance (ESL)
caused by the current into and out of the capacitor.
______________________________________________________________________________________
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