参数资料
型号: MAX8554EEE+T
厂商: Maxim Integrated Products
文件页数: 18/24页
文件大小: 0K
描述: IC CNTRLR BUCK PWM 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: Quick-PWM™
应用: 控制器,DDR,DDR2
输入电压: 4.5 V ~ 28 V
输出数: 1
输出电压: 0.6 V ~ 3.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 带卷 (TR)
4.5V to 28V Input, Synchronous PWM Buck Controllers
for DDR Termination and Point-of-Load Applications
erly. Otherwise, the sense circuitry in the MAX8553/
MAX8554 can interpret the MOSFET gate as “off” while
there is actually still charge left on the gate. Use very
R 2 = R 3 ? OUT - 1 ?
V OUT ( V IN V OUT )
L =
I PEAK
I LOAD
I VALLEY
TIME
Figure 4. Inductor-Current Waveform
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the cur-
rent-sense signals seen by LX and PGND. The IC must
be mounted close to the low-side MOSFET with short,
direct traces making a Kelvin-sense connection to the
source and drain terminals. See the PC Board Layout
section.
Voltage Positioning
The Quick-PWM control architecture responds virtually
instantaneously to transient load changes and elimi-
nates the control loop delay of conventional PWM con-
trollers. Therefore, a large portion of the voltage
deviation during a step load change is from the ESR
(equivalent series resistance) of the output capacitors.
For DDR termination applications, the maximum
allowed voltage deviation is ± 40mV for any output load
transition from sourcing current to sinking current.
Passive voltage positioning adjusts the converter’s out-
put voltage based on its load current to optimize tran-
sient response and minimize the required output
capacitance.
Voltage positioning is implemented by connecting a
low ohmic resistor (R4) as shown in Figure 2.
MOSFET Drivers
The DH and DL drivers are optimized to drive
MOSFETs that can deliver up to 25A output current. An
adaptive dead-time circuit monitors the DL output and
prevents the high-side MOSFET from turning on until
DL is fully off. There must be a low-resistance, low-
inductance path from the DL driver to the MOSFET gate
in order for the adaptive dead-time circuit to work prop-
short, wide traces measuring 10 squares to 20 squares
(50 mils to 100 mils wide if the MOSFET is 1in from the
MAX8553/MAX8554). This adaptive dead-time delay is
in addition to a fixed delay of 30ns (typ). The dead time
at the other edge (DH turning off) is determined by a
fixed 32ns (typ) internal delay.
Design Procedure
Setting the Output Voltage
For the MAX8553, the output voltage, V VTT , is always
50% of V REFIN .
For the MAX8554, the output voltage can be adjusted
from 600mV to 3.5V using a resistive voltage-divider
(R2 and R3 in Figures 1 and 3). To set the voltage,
choose a value for R3 in the range of 1k ? to 10k ? , then
solve for R2 using the following equation:
? V ?
? V FB ?
where V FB is 0.6V.
Inductor Selection
Three key inductor parameters must be specified:
inductance value (L), peak inductor current (I PEAK ),
and DC resistance (R DC ). A good compromise
between size and efficiency is to set the inductor peak-
to-peak ripple current equal to 30% of the maximum
load current, thus LIR = 0.3. The switching frequency,
input voltage, output voltage, and selected LIR deter-
mine the inductor value as follows:
?
V IN x f S x I LOAD ( MAX ) x LIR
where f S is the switching frequency. The exact inductor
value is not critical and can be adjusted in order to
make trade-offs among size, cost, and efficiency.
Lower inductor values minimize size and cost and also
improve transient response but reduce efficiency and
increase output voltage ripple due to higher peak cur-
rents. Higher inductance increases efficiency by reduc-
ing the RMS current.
Find a low-loss inductor with the lowest possible DC
resistance that fits in the allotted dimensions. The
inductor’s current saturation rating must exceed the
18
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