参数资料
型号: MAX8654EVKIT+
厂商: Maxim Integrated Products
文件页数: 13/17页
文件大小: 0K
描述: EVAL KIT MAX8654, MAX8688
标准包装: 1
系列: *
12V, 8A 1.2MHz
Step-Down Regulator
Output Capacitor Selection
The key selection parameters for the output capacitor
are capacitance, ESR, ESL, and voltage-rating require-
ments. These affect the overall stability, output ripple
voltage, and transient response of the DC-DC converter.
The output ripple occurs due to variations in the charge
stored in the output capacitor, the voltage drop due to
the capacitor’s ESR, and the voltage drop due to the
capacitor’s ESL. Calculate the output voltage ripple due
Input Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The total input capacitance must be
equal to or greater than the value given by the following
equation to keep the input ripple voltage within specifi-
cations and minimize the high-frequency ripple current
being fed back to the input source:
D x T S OUT
to the output capacitance, ESR, and ESL as:
V RIPPLE = V RIPPLE ( C ) + V RIPPLE ( ESR ) + V RIPPLE ( ESL )
C IN _ MIN =
xI
V IN _ RIPPLE
V RIPPLE ( C ) =
V RIPPLE ( ESL ) = P ? P x ESL
I P ? P = IN OUT x OUT
I RIPPLE =
where  the  output  ripple  due  to  output  capacitance,
ESR, and ESL is:
I P ? P
8 x C OUT xf S
V RIPPLE ( ESR ) = I P ? P x ESR
I
t ON
The peak-to-peak inductor ripple current (I P-P ) is:
V ? V V
f S x L V IN
Use these equations for initial capacitor selection.
Determine final values by testing a prototype or an eval-
uation circuit. A smaller ripple current results in less
output voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output voltage rip-
ple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The low ESL and ESR of
ceramic capacitors make ripple voltages negligible.
Load-transient response depends on the selected out-
put capacitance. During a load transient, the output
where V IN_RIPPLE is the maximum allowed input ripple
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage. D
is the duty cycle (V OUT / V IN ) and T S is 1 / f S (switching
frequency).
The impedance of the input capacitor at the switching
frequency should be less than that of the input source
so high-frequency switching currents do not pass
through the input source but are instead shunted
through the input capacitor. High source impedance
requires high input capacitance. The input capacitor
must meet the ripple-current requirement imposed by
the switching currents. The RMS input ripple current is
given by:
I LOAD x  V OUT x (V IN ? V OUT )
V IN
where I RIPPLE is the input RMS ripple current.
Compensation Design
The power-transfer function consists of one double pole
and one zero. The double pole is introduced by the out-
put filtering inductor L and the output filtering capacitor
C O . The ESR of the output filtering capacitor deter-
mines the zero. The double pole and zero frequencies
are given as follows:
R O + ESR
2 π x L x C O x ( )
instantly changes by ESR x I LOAD . Before the controller
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time, the controller responds by regulating the output
f P 1 _ LC = f P 2 _ LC =
1
R O + R L
voltage back to its predetermined value. The controller
response time depends on the closed-loop bandwidth.
A higher bandwidth yields a faster response time, pre-
venting the output from deviating further from its regu-
f Z _ ESR =
1
2 π x ESR x C O
lating value. See the Compensation Design section for
more details.
where R L is equal to the sum of the output inductor’s
DCR and the internal switch resistance, R DS(ON) . R O is
the output load resistance, which is equal to the rated
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