参数资料
型号: MAX8686EVKIT+
厂商: Maxim Integrated Products
文件页数: 8/23页
文件大小: 0K
描述: BOARD EVAL FOR MAX8686
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 0.7 V ~ 5.5 V
电流 - 输出: 25A
输入电压: 4.5 V ~ 20 V
稳压器拓扑结构: 降压
频率 - 开关: 300kHz ~ 1MHz
板类型: 完全填充
已供物品:
已用 IC / 零件: MAX8686
Single/Multiphase, Step-Down,
DC-DC Converter Delivers Up to 25A Per Phase
Pin Description
PIN
1
2
3
4
5, 16
6
7–15
17
18–26
27
28
29
30
31
32
NAME
CS-
CS+
GFREQ
EN/SLOPE
LX
RTN
PGND
N.C.
IN
INA
GND
AVL
VL
BST
POK
FUNCTION
Negative Differential Current-Sense Input. Connect CS- to the output side of the inductor for lossless
current sense or to the load side of the current-sense resistor.
Positive Differential Current-Sense Input. Connect CS+ to the inductor through an RC network for
lossless current sense or to the inductor side of the current-sense resistor.
C FREQ Capacitor Return Terminal. Connect the frequency-setting capacitor C FREQ to GFREQ as close
as possible to the device.
Enable and Slope Compensation Input. Connect a resistor from EN/SLOPE to GND to set the desired
slope compensation ramp voltage. An internal 10μA current source pulls up EN/SLOPE. The device
shuts down when the voltage at EN/SLOPE is less than 0.7V. Connect EN/SLOPE to an open-drain or
open-collector output for system enable or phase-shedding function.
Inductor Connection. LX is high impedance during shutdown.
Power Ground for Low-Side Gate Driver. Connect RTN to PGND plane at the return terminal of the IN
bypass capacitor.
Power Ground. Low-side MOSFET source connection.
No Connection. Not internally connected.
Power Input. Connect IN to the input voltage source. Connect input bypass capacitor from IN to PGND
as close as possible to the device. Connect IN, INA, and VL together for 5V operation (see Figure 3).
Input of the Internal VL Linear Regulator. Bypass INA with a 0.1μF capacitor to PGND.
Analog Ground
Input Voltage to the Device’s Internal Analog Circuitry. Connect AVL to VL through a lowpass RC filter.
Internal 5.4V Linear Regulator Output. Connect a ceramic capacitor of at least 1μF from VL to RTN. INA
is the input to this linear regulator. Connect VL to INA when V INA is less than 5.5V. VL provides power
for the MOSFET drivers.
Boost Capacitor Connection. Connect a 0.22μF ceramic capacitor from BST to LX.
Power-Good Output. POK is an open-drain output that is high impedance when the output voltage is at
its nominal regulated voltage. The POK rising threshold is 90% of the reference voltage at REFIN. POK
is internally pulled low during shutdown. Connect POK to GND for slave mode operation.
8
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