参数资料
型号: MAX8707ETL+
厂商: Maxim Integrated Products
文件页数: 15/37页
文件大小: 0K
描述: IC CNTRLR MULTIPHASE 40TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
应用: 控制器,AMD Hammer
输入电压: 4.5 V ~ 5.5 V
输出数: 4
输出电压: 0.8 V ~ 1.55 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 管件
Multiphase, Fixed-Frequency Controller for
AMD Hammer CPU Core Power Supplies
Pin Description (continued)
PIN
17
18
19
20
21
22
23
24
25
26
27
28
29
NAME
REF
VROK
GND
PGND
V CC
PWM1
PWM2
PWM3
PWM4
DRSKP
FBS
VPS
CRSN
FUNCTION
2.0V Reference Output. Bypass to GND with a 0.22μF to 1μF (max) ceramic capacitor. The reference can
source 500μA for external loads. Loading REF degrades output-voltage accuracy according to the REF
load-regulation error.
Open-Drain Power-Good Output. After power-up, VROK remains high impedance as long as the output
voltage remains in regulation. The controller blanks VROK (high impedance) whenever the slew-rate
control is active (output-voltage transitions). VROK is forced low during startup and shutdown. In pulse-
skipping mode (SKIP = high), the upper VROK threshold is disabled.
Analog Ground. Connect the MAX8707 ’ s exposed pad to analog ground.
Power Ground. Ground connection for the driver control outputs (PWM_) and driver skip output ( DRSKP ).
Analog Supply-Voltage Input. Connect V CC to the system supply voltage (4.5V to 5.5V) with a series 10 ?
resistor. Bypass to analog GND with a 1μF or greater ceramic capacitor, as close to the IC as possible.
PWM Driver Control Output for Phase 1. Logic low in shutdown.
PWM Driver Control Output for Phase 2. Logic low in shutdown.
PWM Driver Control Output for Phase 3. Logic low in shutdown.
PWM Driver Control Output for Phase 4. Logic low when disabled (CSP4 = V CC ) and in shutdown.
Driver Skip Control Output. Push/pull logic output that controls the operating mode of the skip-mode driver ICs.
DRSKP swings from V CC to PGND. When DRSKP is high, the driver ICs operate in forced-PWM mode. When
DRSKP is low, the driver ICs enable their zero-crossing comparators and operate in pulse-skipping mode.
Remote Feedback Sense Input. Connect FBS to the CPU output sense point. To minimize output-voltage
errors due to any resistance in series with the FBS input, the controller generates an FBS input bias
current equal in magnitude and opposite in polarity to the VPS output current. FBS is high impedance
in shutdown.
Voltage-Positioning Transconductance-Amplifier Output. Connect a resistor R VPS between VPS and FBS to
set the DC steady-state droop (load line) based on the required voltage-positioning slope (see the
Voltage-Positioning Amplifier section).
R VPS = R DROOP / (R SENSE x G M(VPS) )
where R DROOP is the desired DC voltage-positioning slope, R SENSE is the current-sense resistor, and
G M(VPS) = 200μS. R SENSE is the accurate sense resistor used to generate current-sense voltage (CRSP,
CRSN). When CRSP is connected to V CC , the input to the transconductance amplifier is the sum of the
current-sense voltage (CSP_, CSN_) inputs. When the inductors ’ DC resistances (R DCR ) are used as the
current-sense elements (for lossless sensing), R VPS should include an NTC thermistor to minimize the
temperature dependence of the voltage-positioning slope. To disable voltage positioning, short VPS to
FBS. VPS is high impedance in shutdown.
Negative Current-Sense Resistor Input. CRSN is the negative differential input used for accurate sensing
of the phase 1 inductor current. Connect a current-sense resistor between CRSP and CRSN for accurate
voltage positioning and current limit. Float CRSN when not used (CRSP pulled up to V CC ).
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