参数资料
型号: MAX8742EAI+T
厂商: Maxim Integrated Products
文件页数: 26/34页
文件大小: 0K
描述: IC CNTRLR PWR SUP 28-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
应用: 控制器,笔记本电脑电源系统
输入电压: 4.2 V ~ 30 V
输出数: 2
输出电压: 3.3V,5V,2.5 V ~ 5.5 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
供应商设备封装: 28-SSOP
包装: 带卷 (TR)
500kHz Multi-Output Power-Supply Controllers
with High Impedance in Shutdown
scale down the voltage. Use the maximum inductance
and minimum DCR to get the maximum possible induc-
tor time constant. Select R S and C S so that the maxi-
mum sense-network time constant is equal to or greater
than the maximum inductor time constant.
Reduced Output-Capacitance Application
In applications where higher output ripple is accept-
able, lower output capacitance or higher ESR output
capacitors can be used. In such cases, cycle-by-cycle
stability is maintained by adding feed-forward compen-
sation to offset for the increased output ESR. Figure 8
shows the addition of the feed-forward compensation
circuit. C FB provides noise filtering, R FF is the feed-for-
ward resistor, and C LX provides DC blocking. Use
100pF for C FB and C LX . Select R FF according to the
equation below:
The PC board layout artist must be given explicit
instructions, preferably a pencil sketch showing the
placement of power-switching components and high-
current routing. A ground plane is essential for optimum
performance. In most applications, the circuit is located
on a multilayer board, and full use of the four or more
copper layers is recommended. Use the top layer for
high-current connections, the bottom layer for quiet
connections (REF, SS, GND), and the inner layers for
an uninterrupted ground plane. Use the following step-
by-step guide:
1) Place the high-power components (Figure 1, C1, C3,
C4, Q1, Q2, L1, and R1) first, with their grounds
adjacent:
? Priority 1: Minimize current-sense resistor trace
lengths and ensure accurate current sensing with
Kelvin connections (Figure 9).
R FF ≤
4 × R3 × L × f
ESR
? Priority 2: Minimize ground trace lengths in the
high-current paths (discussed below).
? Priority 3: Minimize other trace lengths in the
Set the value for R FF close to the calculation. Do not
make R FF too small as that introduces too much feed-
forward, possibly causing an overvoltage to be seen at
the feedback pin, and changing the mode of operation
to a voltage mode.
PC Board Layout Considerations
Good PC board layout is required in order to achieve
specified noise, efficiency, and stability performance.
V IN
high-current paths.
a) Use >5mm-wide traces
b) CIN to high-side MOSFET drain: 10mm max
length
c) Rectifier diode cathode to low-side MOSFET:
5mm max length
DH_
C IN
V IN
INDUCTOR
DH_
C IN
LX_
R S
L
R L
C S
V OUT
CSL_
CSH_
LX_
L
R SENSE
V OUT
MAX8741
MAX8742
CSH_
CSL_
C OUT
MAX8741
MAX8742
FB_
C LX
R FF
C FB
R3
C OUT
DL_
DL_
R4
Figure 7. Lossless Inductor Current Sensing
Figure 8. Adding Feed-Forward Compensation
26
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