参数资料
型号: MAX8753ETI+
厂商: Maxim Integrated Products
文件页数: 13/20页
文件大小: 0K
描述: IC DC-DC CONV TFT LCD 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
应用: 转换器,TFT,LCD
输入电压: 2.6 V ~ 5.5 V
输出数: 4
输出电压: 2.6 V ~ 13 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 管件
TFT LCD DC-DC Converter with
Integrated Charge Pumps
V SUPP SUPP
D1
R ON
CLK
P1
C1N
D2
D3
P2
C2N
CLK
R ON
CONTROL
CONTROL
C1
C1N
C1P
CTRL
N1
N2
EA
OUTP
V POS
C POS
R1
C2P
C2
C2N
SUPP OV
THRESHOLD
R2
R5
REF
CHARGE-
PUMP
LOGIC
OSC
EA
FBP
MAX8753
Figure 4. Positive Charge-Pump Regulator Block Diagram
REF
R6
C2. If the voltage across C2 plus a diode drop (V C2 +
V DIODE ) is smaller than the first level-shifted flying
capacitor voltage (V C1 + V SUPP ), charge flows from C1
to C2 until diode D2 turns off. Similarly, when CLKB
becomes high, C2 is also level shifted by V SUPP volts.
This connects C2 in parallel with the reservoir capacitor
C POS . If the voltage across C POS plus a diode drop
(V POS + V DIODE ) is smaller than the second level-shift-
ed flying capacitor voltage (V C2 + V SUPP ), charge flows
from C2 to C POS until diode D3 turns off.
Negative Charge-Pump Regulator
The negative charge-pump regulator is typically used
to generate the negative supply rail for the TFT LCD
gate-driver ICs. The output voltage is set with an exter-
nal resistive voltage-divider from its output to REF with
the midpoint connected to FBN. The number of charge-
pump stages and the setting of the feedback divider
determine the output of the negative charge-pump reg-
ulator. The charge-pump controller includes a high-side
p-channel MOSFET (P3) and a low-side n-channel
MOSFET (N3) to control the power transfer as shown in
Figure 5. The negative charge pump can also be con-
figured as a multiple-stage charge pump. The required
number of stages (n neg ) is determined by V SUPN and
the desired negative output voltage. Figure 1 gives an
example with a two-stage negative charge pump.
In Figure 5, during the first half-cycle, the p-channel
MOSFET turns on and flying capacitor C3 charges to
V SUPN minus a diode drop. During the second half-
cycle, the p-channel MOSFET turns off, and the n-chan-
nel MOSFET turns on, level shifting C3. This connects
C3 in parallel with the reservoir capacitor C NEG . If the
voltage across C3 minus a diode drop is lower than the
voltage across C NEG , charge flows from C3 to C NEG
until the diode turns off. The amount of charge trans-
ferred to the output is controlled by the variable n-chan-
nel on-resistance.
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