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参数资料
| 型号： | MAX8795AETJ+C7P |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 14/31页 |
| 文件大小： | 0K |
| 描述： | IC TFT-LCD DC/DC CONV 32-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 60 |
| 应用： | 转换器，TFT，LCD |
| 输入电压： | 2.5 V ~ 6 V |
| 输出数： | 8 |
| 输出电压： | 2.5 V ~ 18 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 供应商设备封装： | 32-TQFN-EP（5x5） |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页
TFT-LCD DC-DC Converter with
Operational Amplifiers
Pin Description (continued)
PIN
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
—
NAME
OUT4
POS5
NEG5
OUT5
LX
IN
FB
COMP
FBP
DRVP
FBN
DRVN
DEL
CTL
DRN
COM
EP
FUNCTION
Operational-Amplifier 4 Output
Operational-Amplifier 5 Noninverting Input
Operational-Amplifier 5 Inverting Input
Operational-Amplifier 5 Output
n-Channel Power MOSFET Drain and Switching Node. Connect the inductor and Schottky diode to LX
and minimize the trace area for lowest EMI.
Supply Voltage Input. IN can range from 2.5V to 6V.
Step-Up Regulator Feedback Input. Regulates to 1.233V (nominal). Connect a resistive voltage-divider
from the output (V MAIN ) to FB to analog ground (AGND). Place the divider within 5mm of FB.
Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC from COMP to AGND.
See the Loop Compensation section for component selection guidelines.
Gate-On Linear-Regulator Feedback Input. FBP regulates to 1.25V (nominal). Connect FBP to the
center of a resistive voltage-divider between the regulator output and AGND to set the gate-on linear-
regulator output voltage. Place the resistive voltage-divider within 5mm of FBP.
Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channel MOSFET. Connect DRVP to
the base of an external pnp pass transistor. See the Pass-Transistor Selection section.
Gate-Off Linear-Regulator Feedback Input. FBN regulates to 250mV (nominal). Connect FBN to the
center of a resistive voltage-divider between the regulator output and REF to set the gate-off linear-
regulator output voltage. Place the resistive voltage-divider within 5mm of FBN.
Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channel MOSFET. Connect DRVN to
the base of an external npn pass transistor. See the Pass-Transistor Selection section.
High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to set the high-voltage
switch startup delay.
High-Voltage Switch Control Input. When CTL is high, the high-voltage switch between COM and SRC
is on and the high-voltage switch between COM and DRN is off. When CTL is low, the high-voltage
switch between COM and SRC is off and the high-voltage switch between COM and DRN is on. CTL is
inhibited by the undervoltage lockout or when the voltage on DEL is less than 1.25V.
Switch Input. Drain of the internal high-voltage back-to-back p-channel MOSFETs connected to COM.
Internal High-Voltage MOSFET Switch Common Terminal. Do not allow the voltage on COM to exceed
V SRC .
Exposed Paddle. Must be connected to AGND. Do not use as the only ground connection.
14
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