参数资料
型号: MAX8833ETJ+T
厂商: Maxim Integrated Products
文件页数: 4/20页
文件大小: 0K
描述: IC REG BUCK ADJ 3A DL 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.6 V ~ 3.24 V
输入电压: 2.35 V ~ 3.6 V
PWM 型: 电压模式
频率 - 开关: 1MHz ~ 2MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 32-TQFN-EP(5x5)
Dual, 3A, 2MHz Step-Down Regulator
ELECTRICAL CHARACTERISTICS (continued)
(V IN_ = V VDD = V VDL = 3.3V, V FB_ = 0.5V, V SS_ = V REFIN = 600mV, PGND_ = GND, R FSYNC = 10k Ω , L = 0.47μH, C BST_ = 0.1μF,
C SS_ = 0.022μF, PWRGD_ not connected; T A = -40°C to +85°C, typical values are at T A = +25°C, unless otherwise noted.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FSYNC
FSYNC Capture Range
250
2500
kHz
FSYNC Input Threshold
FSYNC Output Voltage
Phase Shift from LX1 to LX2
1.3
0.975
1.5
1.0
180
1.7
1.025
V
V
Degrees
PWRGD1, PWRGD2
PWRGD1 Threshold Voltage
PWRGD2 Threshold Voltage
V FB1 rising with respect to V REFIN ,
and V REFIN > 540mV typ
V FB2 rising with respect to V SS2 ,
and V SS2 > 540mV typ
88
88
90
90
92
92
%
%
PWRGD_ Hysteresis
2.6
%
PWRGD_ Falling Edge Deglitch
PWRGD_ Output-Low Voltage
I PWRGD_ = 4mA
35
45
0.03
55
0.15
μs
V
PWRGD_ Leakage Current
V PWRGD_ = 3.6V,
V FB_ = 0.9V
T A = +25°C
T A = +85°C
0.01
1
μA
Note 2: All devices 100% production tested at +25°C. Limits over temperature are guaranteed by design.
Note 3: V VDD must equal V VDL and be equal to or greater than V IN _.
Typical Operating Characteristics
(V IN1 = V IN2 = 3.3V. MAX8833, circuit of Figure 6, T A = +25°C, unless otherwise noted.)
EFFICIENCY
EFFICIENCY
100
90
80
vs. LOAD CURRENT WITH 3.3V INPUT
100
90
80
vs. LOAD CURRENT WITH 2.5V INPUT
2400
2200
2000
SWITCHING FREQUENCY vs. R FSYNC
70
60
V OUT_ = 2.5V
V OUT_ = 1.8V
V OUT_ = 1.2V
70
60
V OUT_ = 1.8V
V OUT_ = 1.2V
1800
1600
50
40
30
20
10
0
50
40
30
20
10
0
1400
1200
1000
800
600
400
100
1000
10,000
100
1000
10,000
3
6
9
12
15
18
21
LOAD CURRENT (mA)
LOAD CURRENT (mA)
R FSYNC (k Ω )
4
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