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参数资料
| 型号： | MAX9471ETP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 12/13页 |
| 文件大小： | 0K |
| 描述： | IC MULTI-PURPOSE CLK GEN 20-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 时钟发生器 |
| PLL： | 是 |
| 输入： | LVCMOS，晶体 |
| 输出： | LVCMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:4 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 200MHz |
| 除法器/乘法器： | 无/无 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WQFN 裸露焊盘 |
| 供应商设备封装： | 20-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
MAX9471/MAX9472
generates the SCL clock that synchronizes the data
transfer. The SDA line operates as both an input and an
open-drain output. A pullup resistor, typically 4.7k
, is
required on SDA. The SCL line operates only as an
input. A pullup resistor, typically 4.7k
, is required on
SCL if there are multiple masters on the 2-wire bus, or if
the master in a single-master system has an open-drain
SCL output. Figure 2 is the I2C timing diagram.
Multiple-Output Clock Generators with
Dual PLLs and OTP
8
_______________________________________________________________________________________
FS2
FS1
FS0
FREQUENCY (MHz)
AUDIO FREQUENCIES
Open
4.096
Open
Low
6.144
Open
High
8.1920
Open
Low
High
11.2896
Open
Low
Open
12.2880
Open
Low
16.3840
Open
High
22.5792
Open
High
Open
24.5760
Open
High
Low
9.216
Low
Open
High
16.9344
Low
Open
18.4320
Low
Open
Low
33.8688
Low
High
36.864
VIDEO FREQUENCIES
Low
74.1758241
Low
High
74.25
Low
Open
54.054
High
X
Disable three-level
pins and enable I2C
Table 2. MAX9471/MAX9472 Frequency
Selection at CLK2
A4
A3
A2
A1
FREQUENCY (MHz)
AUDIO FREQUENCIES
00
4.096
00
01
6.144
00
10
8.1920
00
11
11.2896
01
00
12.2880
01
16.3840
01
10
22.5792
01
11
24.5760
10
00
9.216
10
01
16.9344
10
18.4320
10
11
33.8688
11
00
36.864
VIDEO FREQUENCIES
11
01
74.1758241
11
10
74.25
11
54.054
Table 3. MAX9471 I2C Frequency
Selection at CLK2 (FS2 = High)
SDA
SCL
tHD, STA
tR
tHIGH
tSU, DAT
tLOW
tF
START
CONDITION
STOP
CONDITION
REPEATED START
CONDITION
START
CONDITION
tHD, DAT
tSU, STO
tSU, STA
tHD, STA
tBUF
Figure 2. I2C Timing Diagram
*MAX9472 can be programmed to FS2 = open settings only.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9476EUG | 功能描述:时钟发生器及支持产品 35.328MHz Clock Synthesizer RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MAX9476EUG-T | 功能描述:时钟发生器及支持产品 35.328MHz Clock Synthesizer RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MAX9480EUP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX9481EUP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX9482EUI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
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