参数资料
型号: MAX9763ETI+T
厂商: Maxim Integrated Products
文件页数: 10/31页
文件大小: 0K
描述: IC AMP AUDIO PWR 3W MONO 28TQFN
标准包装: 2,500
类型: AB 类
输出类型: 1-通道(单声道),带立体声耳机
在某负载时最大输出功率 x 通道数量: 3W x 1 @ 3 欧姆; 200mW x 2 @ 16 欧姆
电源电压: 4.5 V ~ 5.5 V
特点: 消除爆音,输入多路复用器,静音,关机,热保护,
安装类型: 表面贴装
供应商设备封装: 28-TQFN-EP(5x5)
封装/外壳: 28-WFQFN 裸露焊盘
包装: 带卷 (TR)
MAX9760–MAX9763
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
18
______________________________________________________________________________________
Read Data Format
In read mode (R/W = 1), the MAX9760/MAX9762 write
the contents of the selected register to the bus. The
direction of the data flow reverses following the
address acknowledge by the MAX9760/MAX9761. The
master device reads the contents of all registers,
including the read-only status register. Table 6 shows
the status register format.
Interrupt Output (
INT)
The MAX9760/MAX9762 include an interrupt output
(INT) that can indicate to a master device that an event
has occurred. INT is triggered when the state of HPS
changes. During normal operation, INT idles high. If a
headphone is inserted/removed from the jack and that
action is detected by HPS, INT pulls the line low. INT
remains low until a read data operation is executed.
I2C Compatibility
The MAX9760/MAX9762 are compatible with existing I2C
systems. SCL and SDA are high-impedance inputs; SDA
has an open drain that pulls the data line low during the
ninth clock pulse. The communication protocol supports
the standard I2C 8-bit communications. The general call
address is ignored. The MAX9760/MAX9762 addresses
are compatible with the 7-bit I2C addressing protocol
only. No 10-bit formats are supported.
Applications Information
BTL Speaker Amplifiers
The MAX9760–MAX9763 feature speaker amplifiers
designed to drive a load differentially, a configuration
referred to as bridge-tied load (BTL). The BTL configu-
ration (Figure 8) offers advantages over the single-
ended configuration, where one side of the load is
connected to ground. Driving the load differentially
doubles the output voltage compared to a single-
ended amplifier under similar conditions. Thus, the
devices’ differential gain is twice the closed-loop gain
of the input amplifier. The effective gain is given by:
Substituting 2 x VOUT(P-P) for VOUT(P-P) into the follow-
ing equations yields four times the output power due to
doubling of the output voltage:
Since the differential outputs are biased at midsupply,
there is no net DC voltage across the load. This elimi-
nates the need for DC-blocking capacitors required for
single-ended amplifiers. These capacitors can be
large, expensive, consume board space, and degrade
low-frequency performance.
V
P
V
R
RMS
OUT P P
OUT
RMS
L
=
()
22
2
A
R
VD
F
IN
2
REGISTER
ADDRESS
0000 0011
BIT
NAME
VALUE
DESCRIPTION
7
X
Don’t Care
6
X
Don’t Care
5
X
Don’t Care
0*
Speaker mode selected
4
SPKR/HP
1
Headphone mode
selected
0*
Gain-setting A selected
3
GAINA/B
1
Gain-setting B selected
0*
Automatic headphone
detection enabled
2
HPS_D
1
Automatic headphone
detection disabled
(HPS ignored).
0*
Input 1 selected
1
IN1/IN2
1
Input 2 selected
0
X
Don’t Care
Table 5. Control Register Format
+1
VOUT(P-P)
2 x VOUT(P-P)
VOUT(P-P)
-1
Figure 8. Bridge-Tied Load Configuration
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