参数资料
型号: MAX98400BETG+T
厂商: Maxim Integrated Products
文件页数: 11/26页
文件大小: 0K
描述: IC AMP AUDIO STEREO D 24TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: D 类
输出类型: 2 通道(立体声)
在某负载时最大输出功率 x 通道数量: 12W x 2 @ 8 欧姆
电源电压: 8 V ~ 28 V
特点: 消除爆音,差分输入,短路和热保护,关闭
安装类型: 表面贴装
供应商设备封装: 24-TQFN-EP(4x4)
封装/外壳: 24-WFQFN 裸露焊盘
包装: 带卷 (TR)
Stereo, High-Power, Class D Amplifiers
MAX98400A/MAX98400B
19
Inductor-Based Output Filters
Some applications use the ICs with a full inductor-/
capacitor-based (L/C) output filter. See Figure 4 for the
correct connections of these components.
The load impedance of the speaker determines the filter
component selection (Table 3).
Inductors L1 and L2 and capacitor C1 form the primary
output filter. Capacitors C2 and C3 provide common-
mode filtering to reduce radiated emissions. Capacitors
C4 and C5, plus resistors R1 and R2, form a Zobel at
the output. A Zobel corrects the output loading to com-
pensate for the rising impedance of the loudspeaker.
Without a Zobel, the filter exhibits a peak response near
the cutoff frequency.
Component Selection
Input Capacitor
The input AC-coupling capacitors allow the amplifier to
automatically bias the signal to an optimum DC level.
1FF is recommended for the input capacitor.
Power Supplies
The ICs are designed to be operated from a single-
supply voltage, VPVDD, which can range from 8V to 28V.
Inside the ICs, this VPVDD supplies power for the output
FETs and other high-power circuitry, while the low-power
circuitry operates from VS, an internally generated 5V
supply (4.6V typ). VS is internally generated from a lin-
ear regulator that is powered from VPVDD. Bypass both
PVDD and VS pins to ground with a 1FF capacitor.
Internal Regulator VS
For highest efficiency operation and best thermal perfor-
mance, especially at higher VPVDD levels, the VS can be
supplied from an external 5V supply. To do this, connect
a 5V source to the VS pin (4.75V to 5.5V). When a 5V
supply is connected to the VS pin, the internal regulator
is automatically disabled and the power dissipation of
the ICs is reduced.
Supply Bypassing, Layout, and Grounding
Proper layout and grounding are essential for optimum
performance. Use wide traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Proper grounding improves
audio performance, minimizes crosstalk between chan-
nels, and prevents switching noise from coupling into
the audio signal. Connect PGND and GND together at
a single point on the PCB. Route all traces that carry
switching transients away from GND and the traces/
components in the audio signal path.
Bypass each PVDD pin with a 0.1FF capacitor to PGND.
Place the bypass capacitors as close as possible to the
ICs. Place a 220FF capacitor between PVDD and PGND.
Bypass both PVDD and VS pins with a 1FF capacitor to
GND.
Use wide, low-resistance output traces. Current drawn
from the outputs increases as load impedance decreas-
es. High-output trace resistance decreases the power
delivered to the load. The TQFN package features an
exposed thermal pad on its underside. This pad lowers
the package’s thermal resistance by providing a heat
conduction path from the die to the PCB. Connect the
exposed thermal pad to PGND by using a large pad and
multiple vias to the PGND plane.
For best optimum thermal performance, use 2oz copper
and allow lots of PCB area around the device.
Chip Information
PROCESS: CMOS
Figure 4. Output Filter for PWM Mode
Table 3. Filter Component Selection
MAX98400A/B
C3
L1
L2
C2
C1
C5
R2
C4
R1
RL (I)
L1, L2 (h)
C1 (F)
C2, C3 (F)
C4, C5 (F)
R1, R2 (I)
4
10
0.47
0.10
0.22
10
8
15
0.15
15
16
33
0.10
33
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