Stereo, High-Power, Class D Amplifiers
MAX98400A/MAX98400B
17
Limiter Threshold Control (LIM_TH)
There are three modes for the limiter, defined by VLIM_TH,
the voltage applied to the LIM_TH pin (Table 1).
In Mode1, the limiter is disabled. The output clips when
output peak voltage reaches the voltage on PVDD, VPVDD.
In Mode2, the limiter threshold (VTHRESH) tracks supply
voltage, VPVDD. The peak output voltage is limited to
approximately VTHRESH = VPVDD x 0.95.
In Mode3, the limiter threshold, VTHRESH, is program-
mable. VLIM_TH can be set to a voltage proportional to
the desired output threshold. The limiter threshold can
be set down to 0.5 x VPVDD and up to 1.6 x VPVDD.
VTHRESH cannot exceed 22V.
Threshold settings below VPVDD can be used to protect
speakers; the peak output voltage is limited to a value of
VTHRESH = VLIM_TH x 6.4.
Threshold settings above VPVDD can be used to limit the
output distortion; the peak output voltage is limited to a
value of VTHRESH = VLIM_TH x 6.4 x 0.95. The 0.95 fac-
tor takes into account the voltage drop across the power
FET that occurs when the amplifier is clipped. Choose
RLIM1 and RLIM2 (Figure 3) to set the desired voltage at
the LIM_TH pin. For best accuracy, the parallel combina-
tion RLIM1||RLIM2 should be approximately 100kI.
Example:
If the speaker in the application can handle only
12V peak, but VPVDD is higher, the threshold voltage
(VTHRESH) should be set to 12V:
VTHRESH = 12V
The voltage that needs to be applied to VLIM_TH is then
defined as:
VLIM_TH = VTHRESH/6.4 = 12V/6.4 = 1.88V
For a 5V supply, a resistor-divider of RLIM1 = 165kI/
RLIM2 = 270kI gives both an unloaded voltage of 1.82V
and the desired output resistance of approximately
100kI.
If only distortion limiting is desired, set VTHRESH to be
20% higher than VPVDD. This limits the output clipping
levels to approximately 10% THD.
The attack time for the limiter is fixed, typically < 200Fs.
Release Time Control (RELEASE)
The release time for the limiter is set by an external
capacitor at RELEASE (CREL) to GND. Choose CREL =
Release Time [s] x 1FF. The CREL limit is 2.2FF.
Table 1. Limiter Control Modes
Note: VTHRESH is the output peak limiting voltage (limiter threshold voltage).
Figure 3. Limiter Control, Mode3 Configuration (Table 1)
MODE
NAME
FUNCTION
LIM_Th VOLTAGE
RANGE
Mode1
Disable
The limiter is disabled when connecting LIM_TH to VS or a voltage greater
than 3.9V.
3.9V < VLIM_TH P VS
Mode2
PVDD tracking
The output peak voltage is limited to just below the supply voltage,
VPVDD. VTHRESH = VPVDD x 0.95 when LIM_TH is connected to ground or
a voltage below 0.3V.
VGND P VLIM_TH <
0.15V
Mode3
Programmable
The output peak voltage, VTHRESH, is limited to the threshold set by the
voltage applied on the LIM_TH so that VTHRESH = VLIM_TH x 6.4.
When VTHRESH is set 20% higher than VPVDD, the output THD distortion is
limited to 10%.
0.6V P VLIM_TH P 3.8V
MAX98400A
MAX98400B
VS
REGULATOR
LIMITER
CONTROL
RLIM2
RLIM1
LIM_TH
RELEASE
VS
PVDD
18V
C1
1.0F
C2
1.0F
CREL
1.0F
PVDD