参数资料
型号: MAXADCLITE#
厂商: Maxim Integrated Products
文件页数: 13/22页
文件大小: 0K
描述: KIT EVALUATION FOR MAX11645
产品培训模块: Obsolescence Mitigation Program
标准包装: 1
ADC 的数量: 1
位数: 12
采样率(每秒): 94.4k
数据接口: USB
输入范围: ±VREF/2
工作温度: -40°C ~ 85°C
已用 IC / 零件: MAX11645
已供物品: 板,软件
MAX11644/MAX11645
20
______________________________________________________________________________________
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
the full-scale analog input (RMS value) to the RMS
quantization error (residual error). The ideal, theoretical
minimum analog-to-digital noise is caused by quantiza-
tion error only and results directly from the ADC’s reso-
lution (N bits):
SNRMAX[dB] = 6.02dB x N + 1.76dB
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all other ADC output signals.
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the
ADC’s full-scale range, calculate the ENOB as follows:
ENOB = (SINAD - 1.76)/6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first five harmonics to the fun-
damental itself. This is expressed as:
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next largest distor-
tion component.
THD
VVVV
V
log
+++
20
2
3
2
4
2
5
2
1
SINAD dB
Signal
Noise
THD
RMS
()
log
+
20
GND
VLOGIC = 3V/5V
3V OR 5V
SUPPLIES
DGND
3V/5V
GND
*OPTIONAL
4.7
μF
R* = 5
Ω
0.1
μF
VDD
DIGITAL
CIRCUITRY
MAX11644
MAX11645
Figure 14. Power-Supply Grounding Connection
Low-Power, 1-/2-Channel, I2C, 12-Bit ADCs
in Ultra-Tiny 1.9mm x 2.2mm Package
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