参数资料
型号: MAXQ610A-0000+
厂商: Maxim Integrated Products
文件页数: 28/29页
文件大小: 0K
描述: IC MCU 16BIT 64K IR MOD 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
系列: MAXQ®
核心处理器: RISC
芯体尺寸: 16-位
速度: 12MHz
连通性: SPI,UART/USART
外围设备: 欠压检测/复位,红外线,电源故障,POR,WDT
输入/输出数: 20
程序存储器容量: 64KB(64K x 8)
程序存储器类型: 闪存
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 1.7 V ~ 3.6 V
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 管件
其它名称: 90-M6800+B01
MAXQ610
16-Bit Microcontroller with Infrared Module
8
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Pin Description
PIN
32 TQFN
40 TQFN
44 TQFN
NAME
FUNCTION
POWER PINS
15, 29
18, 38
19, 41
VDD
Supply Voltage
13, 22, 30
17, 20,
28, 42
GND
Ground. These pins must be directly connected to the ground plane. The 40-pin
TQFN package does not have any ground pins and connects to ground through
the exposed pad.
14
17
18
REGOUT
Regulator Capacitor. This pin must be connected to ground through a 1.0μF
external ceramic-chip capacitor. The capacitor must be placed as close to this
pin as possible. No devices other than the capacitor should be connected to
this pin.
EP
Exposed Pad. For the 32-pin TQFN package, leave unconnected.
For the 40-pin TQFN package, the exposed pad is internally connected to GND.
Connect to the ground plane.
For the 44-pin TQFN package, the EP has no internal connection to the device.
Leave unconnected. Not intended as an electrical connection point.
RESET PINS
28
37
40
RESET
Digital, Active-Low, Reset Input/Output. The CPU is held in reset when this pin
is low and begins executing from the reset vector when released. The pin
includes pullup current source and should be driven by an open-drain, external
source capable of sinking in excess of 4mA. This pin is driven low as an output
when an internal reset condition occurs.
CLOCK PINS
18
21
23
HFXIN
19
22
24
HFXOUT
High-Frequency Crystal Input. Connect external crystal or resonator between
HFXIN and HFXOUT as the high-frequency system clock. Alternatively, HFXIN is
the input for an external, high-frequency clock source when HFXOUT is
unconnected.
IR FUNCTION PINS
31
39
43
IRTX
IR Transmit Output. IR transmit pin capable of sinking 25mA. This pin defaults
to high-impedance input with the weak pullup disabled during all forms of reset.
Software must configure this pin after release from reset to remove the high-
impedance input condition.
32
40
44
IRRX
IR Receive Input. IR receive pin. This pin defaults to high-impedance input with
the weak pullup disabled during all forms of reset. Software must configure this
pin after release from reset to remove the high-impedance input condition.
相关PDF资料
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