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| 型号： | MAXQ7670AATL/V+ |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | RISC MICROCONTROLLER, PQCC40 |
| 封装： | 5 X 5 MM, ROHS COMPLIANT, TQFN-40 |
| 文件页数： | 22/38页 |
| 文件大小： | 474K |
| 代理商： | MAXQ7670AATL/V+ |
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MAXQ7670A
Microcontroller with 12-Bit ADC,
PGA, 64KB Flash, and CAN Interface
______________________________________________________________________________________
29
Power Management
Advanced power-management features minimize
power consumption by dynamically matching the pro-
cessing speed of the device to the required perfor-
mance level. During periods of reduced activity, lower
the system clock speed to reduce power consumption.
Use the source-clock-divide feature to reduce the sys-
tem clock speed to 1/2, 1/4, and 1/8 of the source
clock’s speed. A lower power state is thus achievable
without additional hardware. For extremely power-sen-
sitive applications, two additional low-power modes are
available:
PMM: divide-by-256 power-management mode
(PMME = 1)
Stop mode (STOP = 1)
Enabling PMM reduces the system clock speed to
1/256 of the source clock speed, and significantly
reduces power consumption. The optional switchback
feature allows enabled interrupt sources including
external, CAN, and SPI interrupts to bring the C out of
the power-management mode and to run at a faster
system clock speed.
Power consumption is minimal in stop mode. In this
mode, the external oscillator, internal RC oscillator, sys-
tem clock, and all processing activity stop. Triggering
an enabled external interrupt or applying an external
reset signal to RESET brings the C out of stop mode.
Upon exiting stop mode, the C can either wait for the
external crystal to warm up, or execute immediately by
using the internal RC oscillator as the crystal warms up.
Interrupts
Multiple interrupt sources are available for quick
response to internal and external events. Examples of
events that can trigger an interrupt are:
Watchdog interrupt
GPIO0–GPIO7 interrupts
SPI mode fault, write collision, receive overrun, and
transfer complete interrupts
Timer 0 low compare, low overflow, capture/compare,
and overflow interrupts
CAN0 receive and transmit interrupts and a change in
CAN0 status register interrupt
ADC data ready interrupt
Voltage brownout interrupts
Crystal oscillator failure interrupt
Each interrupt has flag and enable bits. The flag indi-
cates whether an interrupt event has occurred. Enable
the C to generate an interrupt by setting the enable
bit. Interrupts are organized into modules. Enable the
interrupt individually, by module, and globally.
The C jumps to an ISR after an enabled interrupt event
occurs. Use the interrupt identification register (IIR) to
determine whether the interrupt is a system or peripher-
al interrupt. In the ISR, clear the interrupt flag to elimi-
nate repeated interrupts from the same event. After
clearing the interrupt, allow a delay before issuing the
return from interrupt (RETI) instruction. Asynchronous
interrupt flags require a one-instruction delay and syn-
chronous interrupt flags require a two-instruction delay.
The MAXQ architecture uses a single interrupt vector
(IV) and single ISR design. The IV register holds the
address of the ISR. In the application code, assign a
unique address to each ISR. Otherwise, the IV automat-
ically jumps to 0000h, the beginning of application
code, after an enabled interrupt occurs.
Reset Sources
Reset sources are provided for C control. Although
code execution stops in the reset state, the internal RC
oscillator continues to oscillate. Internal resets, such as
the power-on and watchdog resets, pull RESET low.
Power-On Reset (POR)
An internal POR circuit enhances system reliability. The
POR circuit forces the device to perform a POR when-
ever a rising voltage on DVDD climbs above the POR
threshold. At this point the following events occur:
All registers and circuits enter the default state
The POR flag (WDCN.7) sets to indicate if the source
of the reset was a loss of power
The internal 15MHz RC oscillator becomes the clock
source
Code execution begins at location 8000h
Refer to the
MAXQ7670 User’s Guide for more information.
Watchdog Timer Reset
The watchdog timer functions are described in the
MAXQ7670 User’s Guide. Execution resumes at loca-
tion 8000h following a watchdog timer reset.
External System Reset
Pulling RESET low externally causes the device to enter
the reset state. The external reset functions as
described in the
MAXQ7670 User’s Guide. Execution
resumes at location 8000h after RESET is released.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAXQ7670ATL/V+ | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| MAXQ7670ATL/V+T | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| MAXQ7670ATL+ | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| MAXQ7670ATL+T | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| MAXQ7670EVKIT+ | 功能描述:开发板和工具包 - 其他处理器 MAXQ7670 Eval Kit RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
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