参数资料
型号: MB85RC16PNF-G-JNE1
厂商: Fujitsu Semiconductor America Inc
文件页数: 5/20页
文件大小: 0K
描述: IC FRAM 16KBIT 1MHZ 8SOP
特色产品: FRAM (Ferroelectric RAM)
标准包装: 1,500
格式 - 存储器: RAM
存储器类型: FRAM(Ferroelectric RAM)
存储容量: 16K (2K x 8)
速度: 1MHz
接口: I²C,2 线串口
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOP
包装: 托盘
其它名称: 865-1173
MB85RC16
■ ACKNOWLEDGE (ACK)
In the I 2 C bus, serial data including memory address or memory information is sent in units of 8 bits. The
acknowledge signal indicates that every 8 bits of the data is successfully sent and received. The receiver
side usually outputs the “L” level every time on the 9th SCL clock after every 8 bits are successfully trans-
mitted. On the transmitter side, the bus is temporarily released on this 9th clock to allow the acknowledge
signal to be received and checked. During this released period, the receiver side pulls the SDA line down to
indicate that the communication works correctly.
If the receiver side receives the stop condition before transmitting the acknowledge “L” level, the read
operation ends and the I 2 C bus enters the standby state. If the acknowledge “L” level is not detected, and
the Stop condition is not sent, the bus remains in the released state without doing anything.
? Acknowledge timing overview diagram
SCL
1
2
3
8
9
SDA
Start
The transmitter side should always release SDA on the 9th bit.
At this time, the receiver side outputs a pull-down if the
ACK
receive of the previous 8 bit works correctly (ACK response).
■ MEMORY ADDRESS STRUCTURE
The MB85RC16 has the memory address buffer to store the 11-bit information for the memory address.
As for byte write, page write and random read commands, the complete 11-bit memory address is configured
by inputting the memory upper address (3 bits) and the memory lower address (8 bits), and saving to the
memory address buffer and access to the memory is performed.
As for a current address read command, the complete 11-bit memory address is configured by inputting the
memory upper address (3 bits) and by the memory address lower 8-bit which has saved in the memory
address buffer, and saving to the memory address buffer and access to the memory is performed.
DS501-00001-2v0-E
5
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