参数资料
型号: MB90F498GPMC
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64
封装: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件页数: 46/96页
文件大小: 2317K
代理商: MB90F498GPMC
MB90495G Series
50
DS07-13713-6E
9.
DTP/External Interrupts
The DTP/external interrupt transmits interrupt requests or data transfer requests generated by peripheral devices
to the CPU, generates external interrupt request, and starts the extended intelligent I/O service (EI2OS) .
DTP/External Interrupt Functions
Outputs interrupt requests from external peripheral devices to the CPU using the same procedure as for periph-
eral functions, and generates external interrupts, or starts the extended intelligent I/O service (EI2OS) .
If the interrupt control register is configured to prohibit the extended intelligent I/O service (EI2OS) (ICR : ISE
=
0) , then the external interrupt feature becomes valid, and the process branches into interrupt processing.
If the EI2OS is enabled (ICR : ISE
= 1) , then the DTP function becomes valid, and the EI2OS automatically
transmits data, and after transmitting data a specified number of times, branches into interrupt processing.
Overview of DTP/External Interrupts
External interrupt
DTP functions
Input pins
8 (INT0 to INT7)
Interrupt condition
Each pin sets individually in the detection level configuration register (ELVR)
“H” / “L” level/rising edge/falling edge input “H” / “L” level input
Interrupt numbers
#15 (0FH) , #20 (14H) , #24 (18H) , #27 (1BH)
Interrupt control
The DTP/external interrupt enable register (ENIR) enables or prohibits interrupt request
output
Interrupt flag
Interrupt conditions stored by DTP/external interrupt condition register (EIRR)
Process selection
Set EI2OS to be prohibited (ICR : ISE
= 0) Set EI2OS to be enabled (ICR : ISE = 1)
Processing
Branch to external interrupt process
After the EI2OS conducts automatic data
forwarding the specified number of times,
branches to interrupt processing.
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