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参数资料
| 型号： | MB91F267APMC-GE1 |
| 厂商： | Fujitsu Semiconductor America Inc |
| 文件页数： | 28/53页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 128KB FLASH 64LQFP |
| 标准包装： | 1 |
| 系列： | FR MB91265A |
| 核心处理器： | FR60Lite RISC |
| 芯体尺寸： | 32-位 |
| 速度： | 33MHz |
| 连通性： | UART/USART |
| 外围设备： | DMA，WDT |
| 输入/输出数： | 49 |
| 程序存储器容量： | 128KB（128K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 4K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4 V ~ 5.5 V |
| 数据转换器： | A/D 11x8/10b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 64-LQFP |
| 包装： | 托盘 |
| 其它名称： | 865-1092 |
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37
8183F–AVR–06/12
ATtiny24A/44A/84A
Bits 4:3 – SM[1:0]: Sleep Mode Select Bits 1 and 0
These bits select between available sleep modes, as shown in Table 7-2.
Note:
1. Only recommended with external crystal or resonator selected as clock source
Bit 2 – BODSE: BOD Sleep Enable
The BODSE bit enables setting of BODS control bit, as explained on BODS bit description. BOD
disable is controlled by a timed sequence.
This bit is unused in devices where software BOD disable has not been implemented and will
read as zero in those devices.
7.5.2
PRR – Power Reduction Register
The Power Reduction Register provides a method to reduce power consumption by allowing
peripheral clock signals to be disabled.
Bits 7:4 – Res: Reserved Bits
These bits are reserved in the ATtiny24A/44A and will always read as zero.
Bit 3 – PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
Bit 2 – PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
Bit 1 – PRUSI: Power Reduction USI
Writing a logic one to this bit shuts down the USI by stopping the clock to the module. When
waking up the USI again, the USI should be re initialized to ensure proper operation.
Bit 0 – PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot be used when the ADC is shut down.
Table 7-2.
Sleep Mode Select
SM1
SM0
Sleep Mode
00
Idle
0
1
ADC Noise Reduction
1
0
Power-down
1
Standby(1)
Bit
7
654
3
2
10
–
PRTIM1
PRTIM0
PRUSI
PRADC
PRR
Read/Write
R
R/W
Initial Value
0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MB91F267APMC-GS | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
| MB91F267APMC-GSE1 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
| MB91F267N | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267NA | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
| MB91F267NAPMC-G | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
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