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参数资料
| 型号： | MB91F267NAPMC-GSE1 |
| 厂商： | Fujitsu Semiconductor America Inc |
| 文件页数： | 12/53页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 128KB FLASH 64LQFP |
| 标准包装： | 1 |
| 系列： | FR MB91265A |
| 核心处理器： | FR60Lite RISC |
| 芯体尺寸： | 32-位 |
| 速度： | 33MHz |
| 连通性： | CAN，UART/USART |
| 外围设备： | DMA，WDT |
| 输入/输出数： | 49 |
| 程序存储器容量： | 128KB（128K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 4K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4 V ~ 5.5 V |
| 数据转换器： | A/D 11x8/10b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 64-LQFP |
| 包装： | 托盘 |
| 配用： | 865-1102-ND - BOARD EVAL RS232 100QFP |
| 其它名称： | 865-1091 |
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22
8183F–AVR–06/12
ATtiny24A/44A/84A
old value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in Table 5-1.
When EEPE is set any write to EEPMn will be ignored. During reset, the EEPMn bits will be
reset to 0b00 unless the EEPROM is busy programming.
Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I-bit in SREG is set. Writing
EERIE to zero disables the interrupt. The EEPROM Ready Interrupt generates a constant inter-
rupt when Non-volatile memory is ready for programming.
Bit 2 – EEMPE: EEPROM Master Program Enable
The EEMPE bit determines whether writing EEPE to one will have effect or not.
When EEMPE is set, setting EEPE within four clock cycles will program the EEPROM at the
selected address. If EEMPE is zero, setting EEPE will have no effect. When EEMPE has been
written to one by software, hardware clears the bit to zero after four clock cycles.
Bit 1 – EEPE: EEPROM Program Enable
The EEPROM Program Enable Signal EEPE is the programming enable signal to the EEPROM.
When EEPE is written, the EEPROM will be programmed according to the EEPMn bits setting.
The EEMPE bit must be written to one before a logical one is written to EEPE, otherwise no
EEPROM write takes place. When the write access time has elapsed, the EEPE bit is cleared
by hardware. When EEPE has been set, the CPU is halted for two cycles before the next
instruction is executed.
Bit 0 – EERE: EEPROM Read Enable
The EEPROM Read Enable Signal – EERE – is the read strobe to the EEPROM. When the cor-
rect address is set up in the EEAR Register, the EERE bit must be written to one to trigger the
EEPROM read. The EEPROM read access takes one instruction, and the requested data is
available immediately. When the EEPROM is read, the CPU is halted for four cycles before the
next instruction is executed. The user should poll the EEPE bit before starting the read opera-
tion. If a write operation is in progress, it is neither possible to read the EEPROM, nor to change
the EEAR Register.
5.5.5
GPIOR2 – General Purpose I/O Register 2
Table 5-1.
EEPROM Programming Mode Bits and Programming Times
EEPM1
EEPM0
Programming Time
Operation
0
3.4 ms
Erase and Write in one operation (Atomic Operation)
0
1
1.8 ms
Erase Only
1
0
1.8 ms
Write Only
1
–
Reserved for future use
Bit
765
432
10
MSB
LSB
GPIOR2
Read/Write
R/W
Initial Value
0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MB91F267NPMC-G | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267NPMC-GE1 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267NPMC-GS | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267NPMC-GSE1 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267NPMCR-GE1 | 制造商:FUJITSU 功能描述: 制造商:FUJITSU 功能描述:MCU 32BIT FR 128K FLASH 64LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, FR, 128K FLASH, 64LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, FR, 128K FLASH, 64LQFP, Controller Family/Series:FR60, Core Size:32b 制造商:FUJITSU 功能描述:IC, 32BIT MCU, FR60, 33MHZ, LQFP-64, Controller Family/Series:FR60, Core Size:32bit, No. of I/O's:48, Supply Voltage Min:4V, Supply Voltage Max:5.5V, Digital IC Case Style:LQFP, No. of Pins:64, Program Memory Size:128KB, MSL:- , RoHS Compliant: Yes |
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